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| author | Yinghai Lu <yinghailu@gmail.com> | 2004-05-05 18:03:42 +0000 |
|---|---|---|
| committer | Yinghai Lu <yinghailu@gmail.com> | 2004-05-05 18:03:42 +0000 |
| commit | 7ccff4ea0c1773e57b380cf7477febd64b58afea (patch) | |
| tree | 8eb413540a69e0e9cf8bc7359879e10be85f2651 /src/southbridge/amd/amd8111/amd8111.c | |
| parent | 52f851dd1da8cefb3fb6e4795dc419d76d2b50b1 (diff) | |
| download | coreboot-7ccff4ea0c1773e57b380cf7477febd64b58afea.tar.xz | |
Disable AMD8111 USB2 and remove hard code addr in amd8111 IDE
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1546 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/amd/amd8111/amd8111.c')
| -rw-r--r-- | src/southbridge/amd/amd8111/amd8111.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/src/southbridge/amd/amd8111/amd8111.c b/src/southbridge/amd/amd8111/amd8111.c index e576ea8f0c..2c5d1e80fe 100644 --- a/src/southbridge/amd/amd8111/amd8111.c +++ b/src/southbridge/amd/amd8111/amd8111.c @@ -11,6 +11,7 @@ void amd8111_enable(device_t dev) device_t bus_dev; unsigned index; uint16_t reg_old, reg; + uint8_t byte; /* See if we are on the behind the amd8111 pci bridge */ bus_dev = dev->bus->dev; @@ -38,6 +39,18 @@ void amd8111_enable(device_t dev) return; } } + + if ((dev->vendor == PCI_VENDOR_ID_AMD) && + (dev->device == PCI_DEVICE_ID_AMD_8111_USB2)) { + if(!dev->enabled) { + byte = pci_read_config8(lpc_dev, 0x47); + byte |= (1<<7); + pci_write_config8(lpc_dev, 0x47, byte); + return; + } + + } + reg = reg_old = pci_read_config16(lpc_dev, 0x48); reg &= ~(1 << index); if (dev->enabled) { @@ -46,6 +59,7 @@ void amd8111_enable(device_t dev) if (reg != reg_old) { pci_write_config16(lpc_dev, 0x48, reg); } + } struct chip_control southbridge_amd_amd8111_control = { |