diff options
author | Kevin Paul Herbert <kph@meraki.net> | 2014-12-24 18:43:20 -0800 |
---|---|---|
committer | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2015-02-15 08:50:22 +0100 |
commit | bde6d309dfafe58732ec46314a2d4c08974b62d4 (patch) | |
tree | 17ba00565487ddfbb5759c96adfbb3fffe2a4550 /src/southbridge/amd/amd8111/nic.c | |
parent | 4b10dec1a66122b515b2191f823d7fd379ec655f (diff) | |
download | coreboot-bde6d309dfafe58732ec46314a2d4c08974b62d4.tar.xz |
x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer
On x86, change the type of the address parameter in
read8()/read16/read32()/write8()/write16()/write32() to be a
pointer, instead of unsigned long.
Change-Id: Ic26dd8a72d82828b69be3c04944710681b7bd330
Signed-off-by: Kevin Paul Herbert <kph@meraki.net>
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/7784
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/southbridge/amd/amd8111/nic.c')
-rw-r--r-- | src/southbridge/amd/amd8111/nic.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/southbridge/amd/amd8111/nic.c b/src/southbridge/amd/amd8111/nic.c index 5352705c6c..21df6c05d6 100644 --- a/src/southbridge/amd/amd8111/nic.c +++ b/src/southbridge/amd/amd8111/nic.c @@ -11,7 +11,7 @@ #include "amd8111.h" -#define CMD3 0x54 +#define CMD3 (0x54/(sizeof(u32))) typedef enum { VAL3 = (1 << 31), /* VAL bit for byte 3 */ @@ -45,11 +45,11 @@ static void nic_init(struct device *dev) { struct southbridge_amd_amd8111_config *conf; struct resource *resource; - unsigned long mmio; + u8 *mmio; conf = dev->chip_info; resource = find_resource(dev, PCI_BASE_ADDRESS_0); - mmio = resource->base; + mmio = res2mmio(resource, 0, 0); /* Hard Reset PHY */ printk(BIOS_DEBUG, "Resetting PHY... "); |