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authorPaul Menzel <paulepanter@users.sourceforge.net>2013-07-14 00:24:31 +0200
committerPatrick Georgi <patrick@georgi-clan.de>2013-08-16 22:25:56 +0200
commit4159a8012eb7e0f492457b789999bbc56efc4713 (patch)
tree619470a205219ec4dd1d3f0e06d9ddc907426b78 /src/southbridge/amd/amd8111/nic.c
parent95b573a2db59c21cc60cd6802194beb999919e7f (diff)
downloadcoreboot-4159a8012eb7e0f492457b789999bbc56efc4713.tar.xz
Correct spelling of shadow, setting and memory
Change-Id: Ic7d793754a8b59623b49b7a88c09b5c6b6ef2cf0 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/3768 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/southbridge/amd/amd8111/nic.c')
-rw-r--r--src/southbridge/amd/amd8111/nic.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/amd/amd8111/nic.c b/src/southbridge/amd/amd8111/nic.c
index 4ab7212eda..5352705c6c 100644
--- a/src/southbridge/amd/amd8111/nic.c
+++ b/src/southbridge/amd/amd8111/nic.c
@@ -52,7 +52,7 @@ static void nic_init(struct device *dev)
mmio = resource->base;
/* Hard Reset PHY */
- printk(BIOS_DEBUG, "Reseting PHY... ");
+ printk(BIOS_DEBUG, "Resetting PHY... ");
if (conf->phy_lowreset) {
write32((mmio + CMD3), VAL0 | PHY_RST_POL | RESET_PHY);
} else {