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authorStefan Reinauer <stepan@openbios.org>2003-12-02 17:56:31 +0000
committerStefan Reinauer <stepan@openbios.org>2003-12-02 17:56:31 +0000
commit7c8d35273f40f14f865b54550610d94cd49d4902 (patch)
tree861a45f37a9413da8bac656a3c42f29e3602165b /src/southbridge/amd/amd8111
parent0f4f1d48d9dd93c58ef4f8233f36aa6246b7deb5 (diff)
downloadcoreboot-7c8d35273f40f14f865b54550610d94cd49d4902.tar.xz
fix quartet and S4880 spd initialization.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1304 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/amd/amd8111')
-rw-r--r--src/southbridge/amd/amd8111/amd8111_early_smbus.c19
1 files changed, 16 insertions, 3 deletions
diff --git a/src/southbridge/amd/amd8111/amd8111_early_smbus.c b/src/southbridge/amd/amd8111/amd8111_early_smbus.c
index 9f208f1222..d6edc34612 100644
--- a/src/southbridge/amd/amd8111/amd8111_early_smbus.c
+++ b/src/southbridge/amd/amd8111/amd8111_early_smbus.c
@@ -115,11 +115,10 @@ static int smbus_read_byte(unsigned device, unsigned address)
static void smbus_write_byte(unsigned device, unsigned address, unsigned char val)
{
-#if 1
if (smbus_wait_until_ready() < 0) {
return;
}
-
+#if 0
/* setup transaction */
/* disable interrupts */
outw(inw(SMBUS_IO_BASE + SMBGCTL) & ~((1<<10)|(1<<9)|(1<<8)|(1<<4)),
@@ -138,9 +137,23 @@ static void smbus_write_byte(unsigned device, unsigned address, unsigned char va
/* start the command */
outw((inw(SMBUS_IO_BASE + SMBGCTL) | (1 << 3)), SMBUS_IO_BASE + SMBGCTL);
+#else
+ /* by LYH */
+ outb(0x37,SMBUS_IO_BASE + SMBGSTATUS);
+ /* set the device I'm talking too */
+ outw(((device & 0x7f) << 1) | 0, SMBUS_IO_BASE + SMBHSTADDR);
+
+ /* data to send */
+ outb(val, SMBUS_IO_BASE + SMBHSTDAT);
+
+ outb(address & 0xFF, SMBUS_IO_BASE + SMBHSTCMD);
+
+ /* start the command */
+ outb(0xa, SMBUS_IO_BASE + SMBGCTL);
+#endif
/* poll for transaction completion */
smbus_wait_until_done();
-#endif
+
return;
}