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authorEric Biederman <ebiederm@xmission.com>2004-11-04 11:04:33 +0000
committerEric Biederman <ebiederm@xmission.com>2004-11-04 11:04:33 +0000
commit018d8dd60f2cc0c82faac0ee2657daa163dd43e7 (patch)
tree528de120d262a9df05ce8b6119f593c85fa6b809 /src/southbridge/amd/amd8111
parent4403f6082372d069e3cabe0918d9af5f9c1dccf6 (diff)
downloadcoreboot-018d8dd60f2cc0c82faac0ee2657daa163dd43e7.tar.xz
- Update abuild.sh so it will rebuild successfull builds
- Move pci_set_method out of hardwaremain.c - Re-add debugging name field but only include the CONFIG_CHIP_NAME is enabled. All instances are now wrapped in CHIP_NAME - Many minor cleanups so most ports build. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1737 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/amd/amd8111')
-rw-r--r--src/southbridge/amd/amd8111/amd8111.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/southbridge/amd/amd8111/amd8111.c b/src/southbridge/amd/amd8111/amd8111.c
index 238a997916..5c29534ac3 100644
--- a/src/southbridge/amd/amd8111/amd8111.c
+++ b/src/southbridge/amd/amd8111/amd8111.c
@@ -65,5 +65,6 @@ void amd8111_enable(device_t dev)
}
struct chip_operations southbridge_amd_amd8111_ops = {
+ CHIP_NAME("AMD 8111")
.enable_dev = amd8111_enable,
};