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authorEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-10-26 10:12:15 +1100
committerNico Huber <nico.h@gmx.de>2014-11-05 14:41:47 +0100
commit9a817ef183177d4d9ce6fc37b26e00e147d29cd1 (patch)
treeac82e5076836ce20224b2e8babee9955138cf41e /src/southbridge/amd/amd8111
parent169c0df6b8f07268e3bc49f35520df692705f5d8 (diff)
downloadcoreboot-9a817ef183177d4d9ce6fc37b26e00e147d29cd1.tar.xz
soutbridge/*/bootblock: Use pci_dev_t over device_t typedef
Change-Id: I693b09d588ed6d56177cf86c23497231623b69c0 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/7193 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/southbridge/amd/amd8111')
-rw-r--r--src/southbridge/amd/amd8111/bootblock.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/amd/amd8111/bootblock.c b/src/southbridge/amd/amd8111/bootblock.c
index ba3dc431a0..4c009890d0 100644
--- a/src/southbridge/amd/amd8111/bootblock.c
+++ b/src/southbridge/amd/amd8111/bootblock.c
@@ -26,7 +26,7 @@
static void amd8111_enable_rom(void)
{
u8 byte;
- device_t dev;
+ pci_devfn_t dev;
dev = pci_io_locate_device(PCI_ID(PCI_VENDOR_ID_AMD,
PCI_DEVICE_ID_AMD_8111_ISA), 0);