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authorKyösti Mälkki <kyosti.malkki@gmail.com>2018-05-23 20:00:16 +0300
committerFelix Held <felix-coreboot@felixheld.de>2019-01-06 13:10:27 +0000
commita144e4d6fa93b9ba129b3aa8991cc5fb2ec3c8a6 (patch)
tree32c23066cb4ab18a20c6c7c71395a709c01d0130 /src/southbridge/amd/amd8111
parente7377556cc33b10fdba6d956ac83d823478f5eb4 (diff)
downloadcoreboot-a144e4d6fa93b9ba129b3aa8991cc5fb2ec3c8a6.tar.xz
device: Use pcidev_path_behind()
Change-Id: Iac16f9412d0e6aac908d873c61a4de3935e5318a Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/26518 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/amd/amd8111')
-rw-r--r--src/southbridge/amd/amd8111/amd8111.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/amd/amd8111/amd8111.c b/src/southbridge/amd/amd8111/amd8111.c
index 041a2994e1..fae22ada3b 100644
--- a/src/southbridge/amd/amd8111/amd8111.c
+++ b/src/southbridge/amd/amd8111/amd8111.c
@@ -30,7 +30,7 @@ void amd8111_enable(struct device *dev)
{
unsigned devfn;
devfn = bus_dev->path.pci.devfn + (1 << 3);
- lpc_dev = dev_find_slot(bus_dev->bus->secondary, devfn);
+ lpc_dev = pcidev_path_behind(bus_dev->bus, devfn);
index = ((dev->path.pci.devfn & ~7) >> 3) + 8;
if (dev->path.pci.devfn == 2) { /* EHCI */
index = 16;
@@ -38,7 +38,7 @@ void amd8111_enable(struct device *dev)
} else {
unsigned devfn;
devfn = (dev->path.pci.devfn) & ~7;
- lpc_dev = dev_find_slot(dev->bus->secondary, devfn);
+ lpc_dev = pcidev_path_behind(dev->bus, devfn);
index = dev->path.pci.devfn & 7;
}
if ((!lpc_dev) || (index >= 17)) {