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| author | Myles Watson <mylesgw@gmail.com> | 2009-07-02 18:56:24 +0000 |
|---|---|---|
| committer | Myles Watson <mylesgw@gmail.com> | 2009-07-02 18:56:24 +0000 |
| commit | 29cc9eda2021a87396ef31a6fc81daff6fd1be7a (patch) | |
| tree | d3dfa07ca85547c77c5d07825fc8afcc19489076 /src/southbridge/amd/amd8131 | |
| parent | 2468331952bae0abdc4d76dbe6cf26f05b7825e5 (diff) | |
| download | coreboot-29cc9eda2021a87396ef31a6fc81daff6fd1be7a.tar.xz | |
Move the v3 resource allocator to v2.
Major changes:
1. Separate resource allocation into:
A. Read Resources
B. Avoid fixed resources (constrain limits)
C. Allocate resources
D. Set resources
Usage notes:
Resources which have IORESOURCE_FIXED set in the flags constrain the placement
of other resources. All fixed resources will end up outside (above or below)
the allocated resources.
Domains usually start with base = 0 and limit = 2^address_bits - 1.
I've added an IOAPIC to all platforms so that the old limit of 0xfec00000 is
still there for resources. Some platforms may want to change that, but I didn't
want to break anyone's board.
Resources are allocated in a single block for memory and another for I/O.
Currently the resource allocator doesn't support holes.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4394 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/amd/amd8131')
| -rw-r--r-- | src/southbridge/amd/amd8131/amd8131_bridge.c | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/southbridge/amd/amd8131/amd8131_bridge.c b/src/southbridge/amd/amd8131/amd8131_bridge.c index 9d85077668..29713a37c8 100644 --- a/src/southbridge/amd/amd8131/amd8131_bridge.c +++ b/src/southbridge/amd/amd8131/amd8131_bridge.c @@ -364,9 +364,6 @@ static void bridge_set_resources(struct device *dev) /* set the memory range */ dev->command |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER; res->flags |= IORESOURCE_STORED; - compute_allocate_resource(&dev->link[0], res, - IORESOURCE_MEM | IORESOURCE_PREFETCH, - IORESOURCE_MEM); base = res->base; end = resource_end(res); pci_write_config16(dev, PCI_MEMORY_BASE, base >> 16); |