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author | Patrick Georgi <pgeorgi@google.com> | 2017-09-22 18:21:52 +0200 |
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committer | Nico Huber <nico.h@gmx.de> | 2017-09-22 17:24:39 +0000 |
commit | a2248cbf9ab1de22862a73e1d52d5a2361d55c51 (patch) | |
tree | 940548684064fb72f30905c6d7f90609d30d664e /src/southbridge/amd/amd8132 | |
parent | fdddc463cec6eb10e85b5dd42edf13faceb35fe0 (diff) | |
download | coreboot-a2248cbf9ab1de22862a73e1d52d5a2361d55c51.tar.xz |
device/dram/ddr2: Add break to several case statements that lack it
For all valid SPD values the same decoded tRR was returned.
Change-Id: Iec43f8c7460dfcf68f7c92dfdf333b004f368b65
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Found-by: Coverity Scan #1381369, #1381370, 1381371, 1381372, 1381373
Reviewed-on: https://review.coreboot.org/21642
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/southbridge/amd/amd8132')
0 files changed, 0 insertions, 0 deletions