diff options
author | Subrata Banik <subrata.banik@intel.com> | 2017-09-21 20:23:41 +0530 |
---|---|---|
committer | Aaron Durbin <adurbin@chromium.org> | 2017-09-22 16:23:30 +0000 |
commit | fdddc463cec6eb10e85b5dd42edf13faceb35fe0 (patch) | |
tree | 860eab060df7f323a50854802d4b739943d11e3f /src/southbridge/amd/amd8132 | |
parent | 73b8503183a552fa31fb55d539e9cc2ad4492e8d (diff) | |
download | coreboot-fdddc463cec6eb10e85b5dd42edf13faceb35fe0.tar.xz |
soc/intel/skylake: Calculate soc reserved memory size
This patch implements soc override function to calculate reserve memory
size (PRMRR, TraceHub, PTT etc). System memory should reserve those
memory ranges.
BRANCH=none
BUG=b:63974384
TEST=Ensures DRAM based resource allocation has taken care
of intel soc reserved ranges.
Change-Id: I19583f7d18ca11c3a58eb61c927e5c3c3b65d2ec
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/21540
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/amd/amd8132')
0 files changed, 0 insertions, 0 deletions