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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2016-08-31 19:22:16 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-08-31 20:22:46 +0200 |
| commit | ba28e8d73b143def8dfe7c0dc7cfcbce83c601a1 (patch) | |
| tree | 9f7e4416b63e26ee3f4df6f9a61ab55f377bcb5f /src/southbridge/amd/cimx/sb700 | |
| parent | 2e4d80687dd79890c7c9edad8dbaf6e89edf2afc (diff) | |
| download | coreboot-ba28e8d73b143def8dfe7c0dc7cfcbce83c601a1.tar.xz | |
src/southbridge: Code formating
Change-Id: Icfc35b73bacb60b1f21e71e70ad4418ec3e644f6
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16291
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/southbridge/amd/cimx/sb700')
| -rw-r--r-- | src/southbridge/amd/cimx/sb700/Platform.h | 2 | ||||
| -rw-r--r-- | src/southbridge/amd/cimx/sb700/reset.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/amd/cimx/sb700/Platform.h b/src/southbridge/amd/cimx/sb700/Platform.h index 7562417dd7..7476cb96fa 100644 --- a/src/southbridge/amd/cimx/sb700/Platform.h +++ b/src/southbridge/amd/cimx/sb700/Platform.h @@ -62,7 +62,7 @@ void TraceCode ( UINT32 Level, UINT32 Code); #if CONFIG_REDIRECT_SBCIMX_TRACE_TO_SERIAL #define TRACE(Arguments) printk Arguments #else - #define TRACE(Arguments) do {} while(0) + #define TRACE(Arguments) do {} while (0) #endif #define TRACECODE(Arguments) #endif diff --git a/src/southbridge/amd/cimx/sb700/reset.c b/src/southbridge/amd/cimx/sb700/reset.c index 9a987602d3..a5c42b72c9 100644 --- a/src/southbridge/amd/cimx/sb700/reset.c +++ b/src/southbridge/amd/cimx/sb700/reset.c @@ -32,7 +32,7 @@ static inline void set_bios_reset(void) int i; nodes = ((pci_read_config32(PCI_DEV(CONFIG_CBB, CONFIG_CDB, 0), 0x60) >> 4) & 7) + 1; - for(i = 0; i < nodes; i++) { + for (i = 0; i < nodes; i++) { dev = NODE_PCI(i, 0); htic = pci_read_config32(dev, HT_INIT_CONTROL); htic &= ~HTIC_BIOSR_Detect; |