diff options
author | Dave Frodin <dave.frodin@se-eng.com> | 2014-06-13 08:12:48 -0600 |
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committer | Dave Frodin <dave.frodin@se-eng.com> | 2014-07-02 21:47:28 +0200 |
commit | 2093c4f7c220068e630b756dd19b89ab1ddec88e (patch) | |
tree | fa596f88343dedd290583896947647b38310f832 /src/southbridge/amd/cimx/sb800/amd_pci_int_types.h | |
parent | 931c1dcec043e6baac718a94f8731cc31461d4db (diff) | |
download | coreboot-2093c4f7c220068e630b756dd19b89ab1ddec88e.tar.xz |
AMD/agesa: Add functions for AMD PCI IRQ routing
Port the changes that were made in amd/cimx to amd/agesa
as were done in:
commit c93a75a5ab067f86104028b74d92fc54cb939cd5
Author: Mike Loptien <mike.loptien@se-eng.com>
Date: Fri Jun 6 15:16:29 2014 -0600
AMD/CIMx: Add functions for AMD PCI IRQ routing
This change also moves the PCI INT functions to
southbridge/amd so that they can be used by CIMX and
AGESA. The amd/persimmon board is updated for this
change.
Signed-off-by: Dave Frodin <dave.frodin@se-eng.com>
Change-Id: I525be90f9cf8e825e162d53a7ecd1e69c6e27637
Reviewed-on: http://review.coreboot.org/6065
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/southbridge/amd/cimx/sb800/amd_pci_int_types.h')
-rw-r--r-- | src/southbridge/amd/cimx/sb800/amd_pci_int_types.h | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/src/southbridge/amd/cimx/sb800/amd_pci_int_types.h b/src/southbridge/amd/cimx/sb800/amd_pci_int_types.h new file mode 100644 index 0000000000..173059c247 --- /dev/null +++ b/src/southbridge/amd/cimx/sb800/amd_pci_int_types.h @@ -0,0 +1,33 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Sage Electronic Engineering, LLC. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef AMD_PCI_INT_TYPES_H +#define AMD_PCI_INT_TYPES_H + +const char * intr_types[] = { + [0x00] = "INTA#\t", "INTB#\t", "INTC#\t", "INTD#\t", "INTE#\t", "INTF#\t", "INTG#\t", "INTH#\t", + [0x08] = "Misc\t", "Misc0\t", "Misc1\t", "Misc2\t", "Ser IRQ INTA", "Ser IRQ INTB", "Ser IRQ INTC", "Ser IRQ INTD", + [0x10] = "SCI\t", "SMBUS0\t", "ASF\t", "HDA\t", "FC\t\t", "GEC\t", "PerMon\t", + [0x20] = "IMC INT0\t", "IMC INT1\t", "IMC INT2\t", "IMC INT3\t", "IMC INT4\t", "IMC INT5\t", + [0x30] = "Dev18.0 INTA", "Dev18.2 INTB", "Dev19.0 INTA", "Dev19.2 INTB", "Dev22.0 INTA", "Dev22.2 INTB", "Dev20.5 INTC", + [0x40] = "IDE\t", "SATA\t", + [0x50] = "GPPInt0\t", "GPPInt1\t", "GPPInt2\t", "GPPInt3\t" +}; + +#endif /* AMD_PCI_INT_TYPES_H */ |