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| author | Michał Żygowski <michal.zygowski@3mdeb.com> | 2019-12-01 17:41:23 +0100 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2020-01-05 17:01:48 +0000 |
| commit | 287ce5f1ee8c3765d05bfbc0a6dd5ea9ec8b5c87 (patch) | |
| tree | 9ffb1915bf2186e3a5f41af09f968d5b3ce1902a /src/southbridge/amd/cimx/sb800/late.c | |
| parent | d913036e18034d6756805aabd868e1091c97ac0c (diff) | |
| download | coreboot-287ce5f1ee8c3765d05bfbc0a6dd5ea9ec8b5c87.tar.xz | |
sb/amd/{agesa,pi}: use ACPIMMIO common block wherever possible
TEST=boot PC Engines apu1 and apu2 and launch Debian Linux
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: Ic3d5abc8f3b235ea61f66950ada8aff1dc48f8c3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37400
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/southbridge/amd/cimx/sb800/late.c')
| -rw-r--r-- | src/southbridge/amd/cimx/sb800/late.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/southbridge/amd/cimx/sb800/late.c b/src/southbridge/amd/cimx/sb800/late.c index 4233a6ff0d..d6003bede2 100644 --- a/src/southbridge/amd/cimx/sb800/late.c +++ b/src/southbridge/amd/cimx/sb800/late.c @@ -14,7 +14,7 @@ * GNU General Public License for more details. */ - +#include <amdblocks/acpimmio.h> #include <device/mmio.h> #include <device/device.h> #include <device/pci.h> /* device_operations */ @@ -400,9 +400,9 @@ static void sb800_enable(struct device *dev) * to function as GPIO {GPIO 35:0}. */ if (!sb_chip->disconnect_pcib && dev->enabled) - RWMEM(ACPI_MMIO_BASE + PMIO_BASE + SB_PMIOA_REGEA, AccWidthUint8, ~BIT0, 0); + pm_write8(0xea, pm_read8(0xea) & 0xfe); else - RWMEM(ACPI_MMIO_BASE + PMIO_BASE + SB_PMIOA_REGEA, AccWidthUint8, ~BIT0, BIT0); + pm_write8(0xea, (pm_read8(0xea) & 0xfe) | 1); break; case PCI_DEVFN(0x14, 6): /* 0:14:6 GEC */ |