diff options
| author | Dave Frodin <dave.frodin@se-eng.com> | 2014-06-05 14:30:22 -0600 |
|---|---|---|
| committer | Dave Frodin <dave.frodin@se-eng.com> | 2014-06-11 20:06:21 +0200 |
| commit | ac1b875b554f45b0c98d375369119495b7ad2a2a (patch) | |
| tree | cb397c9fe4972193e4b95808c37cfc267f160401 /src/southbridge/amd/cimx/sb800/lpc.h | |
| parent | 61f902d4a7779d0ce30de79df7a71ad0c3788887 (diff) | |
| download | coreboot-ac1b875b554f45b0c98d375369119495b7ad2a2a.tar.xz | |
amd/southbridge/lpc: SPI BAR has fixed size/location
The CIMX sb700/sb800/sb900 and agesa/hudson code was treating
the LPC SPI BAR as a normal PCI BAR. This will set the
resources for a fixed size at a fixed address. This was tested
on hp/abm, amd/persimmon, and gizmosphere/gizmo boards.
Change-Id: I1367efe0bbb53b7727258585963f61f4bd02ea1d
Signed-off-by: Dave Frodin <dave.frodin@se-eng.com>
Reviewed-on: http://review.coreboot.org/5947
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/southbridge/amd/cimx/sb800/lpc.h')
| -rw-r--r-- | src/southbridge/amd/cimx/sb800/lpc.h | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/src/southbridge/amd/cimx/sb800/lpc.h b/src/southbridge/amd/cimx/sb800/lpc.h index 575b9f7a75..8a657d8559 100644 --- a/src/southbridge/amd/cimx/sb800/lpc.h +++ b/src/southbridge/amd/cimx/sb800/lpc.h @@ -2,6 +2,7 @@ * This file is part of the coreboot project. * * Copyright (C) 2011 Advanced Micro Devices, Inc. + * Copyright (C) 2014 Sage Electronic Engineering, LLC * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -20,7 +21,9 @@ #ifndef _SB800_LPC_H_ #define _SB800_LPC_H_ -#define SPIROM_BASE_ADDRESS_REGISTER 0xA0 /* SPI ROM base address */ +#define SPIROM_BASE_ADDRESS_REGISTER 0xA0 +#define SPI_ROM_ENABLE 0x02 +#define SPI_BASE_ADDRESS 0xFEC10000 void lpc_read_resources(device_t dev); void lpc_set_resources(device_t dev); |