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author | Elyes HAOUAS <ehaouas@noos.fr> | 2019-06-23 07:01:22 +0200 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2019-10-28 11:57:01 +0000 |
commit | 400f9ca2613297b3034d96286eeeb009a1eb2ac0 (patch) | |
tree | 1af487da965801d4810ff65c67b3d7ae206e9aa3 /src/southbridge/amd/cimx/sb800/spi.c | |
parent | 34715df801dd8bee119c6062c3a9d5acd835e2e1 (diff) | |
download | coreboot-400f9ca2613297b3034d96286eeeb009a1eb2ac0.tar.xz |
src/southbridge: Use 'include <stdlib.h>' when appropriate
Also, including <types.h>, is supposed to provide stdint and stddef.
Change-Id: I7e1a3483aae0e3f0a7bc2eb2c1862ae7a325fd9c
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33683
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/southbridge/amd/cimx/sb800/spi.c')
-rw-r--r-- | src/southbridge/amd/cimx/sb800/spi.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/amd/cimx/sb800/spi.c b/src/southbridge/amd/cimx/sb800/spi.c index ffda0a8ea4..fcb4fa1111 100644 --- a/src/southbridge/amd/cimx/sb800/spi.c +++ b/src/southbridge/amd/cimx/sb800/spi.c @@ -12,8 +12,7 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ -#include <stdint.h> -#include <stdlib.h> + #include <device/mmio.h> #include <console/console.h> #include <spi_flash.h> @@ -21,6 +20,7 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ops.h> +#include <types.h> #include "SBPLATFORM.h" #include <vendorcode/amd/cimx/sb800/ECfan.h> |