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authorzbao <fishbaozi@gmail.com>2012-08-03 16:58:53 +0800
committerAlexandru Gagniuc <mr.nuke.me@gmail.com>2012-08-05 07:01:26 +0200
commit366f0fc30a6b0439cfa2867b3d435975512bd9b8 (patch)
treecd2bd91a5648b3aef503014e4c46c9f95aa04da1 /src/southbridge/amd/cimx/sb800
parentcc3b18843f5db9ccdb2c8cd609897e2560f47a92 (diff)
downloadcoreboot-366f0fc30a6b0439cfa2867b3d435975512bd9b8.tar.xz
AMD SB: Call the rtc update if needed (Propagation)
Apply the change http://review.coreboot.org/1390 to all the AMD southbridge. Change-Id: I8e94014f8883a0408b68355d9aa33aea4373881f Signed-off-by: Zheng Bao <zheng.bao@amd.com> Signed-off-by: zbao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/1406 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/southbridge/amd/cimx/sb800')
-rw-r--r--src/southbridge/amd/cimx/sb800/late.c12
1 files changed, 11 insertions, 1 deletions
diff --git a/src/southbridge/amd/cimx/sb800/late.c b/src/southbridge/amd/cimx/sb800/late.c
index 0ce82b3307..7286a6d16d 100644
--- a/src/southbridge/amd/cimx/sb800/late.c
+++ b/src/southbridge/amd/cimx/sb800/late.c
@@ -23,6 +23,7 @@
#include <device/pci_ids.h>
#include <arch/ioapic.h>
#include <device/smbus.h> /* smbus_bus_operations */
+#include <pc80/mc146818rtc.h>
#include <console/console.h> /* printk */
#include <arch/acpi.h>
#include "lpc.h" /* lpc_read_resources */
@@ -120,11 +121,20 @@ static struct pci_operations lops_pci = {
.set_subsystem = pci_dev_set_subsystem,
};
+static void lpc_init(device_t dev)
+{
+ printk(BIOS_DEBUG, "SB800 - Late.c - lpc_init - Start.\n");
+
+ rtc_check_update_cmos_date(RTC_HAS_ALTCENTURY);
+
+ printk(BIOS_DEBUG, "SB800 - Late.c - lpc_init - End.\n");
+}
+
static struct device_operations lpc_ops = {
.read_resources = lpc_read_resources,
.set_resources = lpc_set_resources,
.enable_resources = pci_dev_enable_resources,
- .init = 0,
+ .init = lpc_init,
.scan_bus = scan_static_bus,
.ops_pci = &lops_pci,
};