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authorAaron Durbin <adurbin@chromium.org>2018-04-19 21:15:25 -0600
committerAaron Durbin <adurbin@chromium.org>2018-04-23 20:58:58 +0000
commit851dde8255efda7ecf9b37a3b7b22f4edab8881f (patch)
tree10a4d241f9af25db1fb9c71b696dfecb7ca5cf44 /src/southbridge/amd/cimx
parent6c2b10e98933569f028d2ee78efb4cc660d2f9ac (diff)
downloadcoreboot-851dde8255efda7ecf9b37a3b7b22f4edab8881f.tar.xz
drivers/spi: reduce confusion in the API
Julius brought up confusion about the current spi api in [1]. In order alleviate the confusion stemming from supporting x86 spi flash controllers: - Remove spi_xfer_two_vectors() which was fusing transactions to accomodate the limitations of the spi controllers themselves. - Add spi_flash_vector_helper() for the x86 spi flash controllers to utilize in validating driver/controller current assumptions. - Remove the xfer() callback in the x86 spi flash drivers which will trigger an error as these controllers can't support the api. [1] https://mail.coreboot.org/pipermail/coreboot/2018-April/086561.html Change-Id: Id88adc6ad5234c29a739d43521c5f344bb7d3217 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/25745 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/southbridge/amd/cimx')
-rw-r--r--src/southbridge/amd/cimx/sb800/spi.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/src/southbridge/amd/cimx/sb800/spi.c b/src/southbridge/amd/cimx/sb800/spi.c
index ba3f643b73..2c541e352e 100644
--- a/src/southbridge/amd/cimx/sb800/spi.c
+++ b/src/southbridge/amd/cimx/sb800/spi.c
@@ -151,9 +151,14 @@ int chipset_volatile_group_end(const struct spi_flash *flash)
return 0;
}
+static int xfer_vectors(const struct spi_slave *slave,
+ struct spi_op vectors[], size_t count)
+{
+ return spi_flash_vector_helper(slave, vectors, count, spi_ctrlr_xfer);
+}
+
static const struct spi_ctrlr spi_ctrlr = {
- .xfer = spi_ctrlr_xfer,
- .xfer_vector = spi_xfer_two_vectors,
+ .xfer_vector = xfer_vectors,
.max_xfer_size = AMD_SB_SPI_TX_LEN,
.flags = SPI_CNTRLR_DEDUCT_CMD_LEN,
};