diff options
author | Elyes HAOUAS <ehaouas@noos.fr> | 2021-01-27 12:18:42 +0100 |
---|---|---|
committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2021-02-10 09:25:49 +0000 |
commit | 656484285782a0d48e2f38cdae7255fe3121cce8 (patch) | |
tree | d1422fe4962eacbba207dc098a931e9b33b38e92 /src/southbridge/amd/cimx | |
parent | b5a237d9116915d8c76d012abb9503ed12472c4b (diff) | |
download | coreboot-656484285782a0d48e2f38cdae7255fe3121cce8.tar.xz |
sb/amd/cimx/sb800/acpi: Convert to ASL 2.0 syntax
Also, fix typo on "success".
Built gizmosphere/gizmo generate identical 'build/dsdt.dsl'.
Change-Id: I6fd7056d8053f0097b5c9de6b4e2e6db38910a2e
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45875
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/southbridge/amd/cimx')
-rw-r--r-- | src/southbridge/amd/cimx/sb800/acpi/fch.asl | 30 | ||||
-rw-r--r-- | src/southbridge/amd/cimx/sb800/acpi/pcie.asl | 144 | ||||
-rw-r--r-- | src/southbridge/amd/cimx/sb800/acpi/smbus.asl | 62 |
3 files changed, 118 insertions, 118 deletions
diff --git a/src/southbridge/amd/cimx/sb800/acpi/fch.asl b/src/southbridge/amd/cimx/sb800/acpi/fch.asl index a3a17a4f35..59b556b5b0 100644 --- a/src/southbridge/amd/cimx/sb800/acpi/fch.asl +++ b/src/southbridge/amd/cimx/sb800/acpi/fch.asl @@ -7,23 +7,23 @@ Method(_OSC,4) { /* Check for proper PCI/PCIe UUID */ - If(LEqual(Arg0,ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))) + If (Arg0 == ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766")) { /* Let OS control everything */ Return (Arg3) } Else { CreateDWordField(Arg3,0,CDW1) - Or(CDW1,4,CDW1) // Unrecognized UUID - Return(Arg3) + CDW1 |= 4 // Unrecognized UUID + Return (Arg3) } } Method(_BBN, 0) { /* Bus number = 0 */ - Return(0) + Return (0) } Method(_STA, 0) { /* DBGO("\\_SB\\PCI0\\_STA\n") */ - Return(0x0B) /* Status is visible */ + Return (0x0b) /* Status is visible */ } Method(_PRT,0) { @@ -126,12 +126,12 @@ Method(_CRS, 0) { * 32bit (0x00000000 - TOM1) will wrap and give the same * result as 64bit (0x100000000 - TOM1). */ - Store(TOM1, MM1B) - ShiftLeft(0x10000000, 4, Local0) - Subtract(Local0, TOM1, Local0) - Store(Local0, MM1L) + MM1B = TOM1 + Local0 = 0x10000000 << 4 + Local0 -= TOM1 + MM1L = Local0 - Return(CRES) /* note to change the Name buffer */ + Return (CRES) /* note to change the Name buffer */ } /* end of Method(_SB.PCI0._CRS) */ /* @@ -160,8 +160,8 @@ Method(_INI, 0) { OSFL() /* On older chips, clear PciExpWakeDisEn */ - /*if (LLessEqual(\SBRI, 0x13)) { - * Store(0,\PWDE) + /*if (\SBRI <= 0x13) { + * \PWDE = 0 * } */ } /* End Method(_SB._INI) */ @@ -173,10 +173,10 @@ Scope(\){ CMTI, 8, /* Client Management Data register */ G64E, 1, - G64O, 1, - G32O, 2, + G64O, 1, + G32O, 2, , 2, - GPSL, 2, + GPSL, 2, } /* GPM Port register */ diff --git a/src/southbridge/amd/cimx/sb800/acpi/pcie.asl b/src/southbridge/amd/cimx/sb800/acpi/pcie.asl index 4420938d67..a154fd80e0 100644 --- a/src/southbridge/amd/cimx/sb800/acpi/pcie.asl +++ b/src/southbridge/amd/cimx/sb800/acpi/pcie.asl @@ -138,18 +138,18 @@ Scope(\_SB) { { \_SB.CIRQ() } - Store(Arg0, PICM) + PICM = Arg0 } Method(CIRQ, 0x00, NotSerialized){ - Store(0, PIRA) - Store(0, PIRB) - Store(0, PIRC) - Store(0, PIRD) - Store(0, PIRE) - Store(0, PIRF) - Store(0, PIRG) - Store(0, PIRH) + PIRA = 0 + PIRB = 0 + PIRC = 0 + PIRD = 0 + PIRE = 0 + PIRF = 0 + PIRG = 0 + PIRH = 0 } Name(IRQB, ResourceTemplate(){ @@ -170,27 +170,27 @@ Scope(\_SB) { Method(_STA, 0) { if (PIRA) { - Return(0x0B) /* sata is invisible */ + Return (0x0b) /* sata is invisible */ } else { - Return(0x09) /* sata is disabled */ + Return (0x09) /* sata is disabled */ } } /* End Method(_SB.INTA._STA) */ Method(_DIS ,0) { /* DBGO("\\_SB\\LNKA\\_DIS\n") */ - Store(0, PIRA) + PIRA = 0 } /* End Method(_SB.INTA._DIS) */ Method(_PRS ,0) { /* DBGO("\\_SB\\LNKA\\_PRS\n") */ - Return(IRQP) + Return (IRQP) } /* Method(_SB.INTA._PRS) */ Method(_CRS ,0) { /* DBGO("\\_SB\\LNKA\\_CRS\n") */ CreateWordField(IRQB, 0x1, IRQN) - ShiftLeft(1, PIRA, IRQN) - Return(IRQB) + IRQN = 1 << PIRA + Return (IRQB) } /* Method(_SB.INTA._CRS) */ Method(_SRS, 1) { @@ -200,9 +200,9 @@ Scope(\_SB) { /* Use lowest available IRQ */ FindSetRightBit(IRQM, Local0) if (Local0) { - Decrement(Local0) + Local0-- } - Store(Local0, PIRA) + PIRA = Local0 } /* End Method(_SB.INTA._SRS) */ } /* End Device(INTA) */ @@ -212,27 +212,27 @@ Scope(\_SB) { Method(_STA, 0) { if (PIRB) { - Return(0x0B) /* sata is invisible */ + Return (0x0b) /* sata is invisible */ } else { - Return(0x09) /* sata is disabled */ + Return (0x09) /* sata is disabled */ } } /* End Method(_SB.INTB._STA) */ Method(_DIS ,0) { /* DBGO("\\_SB\\LNKB\\_DIS\n") */ - Store(0, PIRB) + PIRB = 0 } /* End Method(_SB.INTB._DIS) */ Method(_PRS ,0) { /* DBGO("\\_SB\\LNKB\\_PRS\n") */ - Return(IRQP) + Return (IRQP) } /* Method(_SB.INTB._PRS) */ Method(_CRS ,0) { /* DBGO("\\_SB\\LNKB\\_CRS\n") */ CreateWordField(IRQB, 0x1, IRQN) - ShiftLeft(1, PIRB, IRQN) - Return(IRQB) + IRQN = 1 << PIRB + Return (IRQB) } /* Method(_SB.INTB._CRS) */ Method(_SRS, 1) { @@ -242,9 +242,9 @@ Scope(\_SB) { /* Use lowest available IRQ */ FindSetRightBit(IRQM, Local0) if (Local0) { - Decrement(Local0) + Local0-- } - Store(Local0, PIRB) + PIRB = Local0 } /* End Method(_SB.INTB._SRS) */ } /* End Device(INTB) */ @@ -254,15 +254,15 @@ Scope(\_SB) { Method(_STA, 0) { if (PIRC) { - Return(0x0B) /* sata is invisible */ + Return (0x0b) /* sata is invisible */ } else { - Return(0x09) /* sata is disabled */ + Return (0x09) /* sata is disabled */ } } /* End Method(_SB.INTC._STA) */ Method(_DIS ,0) { /* DBGO("\\_SB\\LNKC\\_DIS\n") */ - Store(0, PIRC) + PIRC = 0 } /* End Method(_SB.INTC._DIS) */ Method(_PRS ,0) { @@ -273,8 +273,8 @@ Scope(\_SB) { Method(_CRS ,0) { /* DBGO("\\_SB\\LNKC\\_CRS\n") */ CreateWordField(IRQB, 0x1, IRQN) - ShiftLeft(1, PIRC, IRQN) - Return(IRQB) + IRQN = 1 << PIRC + Return (IRQB) } /* Method(_SB.INTC._CRS) */ Method(_SRS, 1) { @@ -284,9 +284,9 @@ Scope(\_SB) { /* Use lowest available IRQ */ FindSetRightBit(IRQM, Local0) if (Local0) { - Decrement(Local0) + Local0-- } - Store(Local0, PIRC) + PIRC = Local0 } /* End Method(_SB.INTC._SRS) */ } /* End Device(INTC) */ @@ -296,27 +296,27 @@ Scope(\_SB) { Method(_STA, 0) { if (PIRD) { - Return(0x0B) /* sata is invisible */ + Return (0x0b) /* sata is invisible */ } else { - Return(0x09) /* sata is disabled */ + Return (0x09) /* sata is disabled */ } } /* End Method(_SB.INTD._STA) */ Method(_DIS ,0) { /* DBGO("\\_SB\\LNKD\\_DIS\n") */ - Store(0, PIRD) + PIRD = 0 } /* End Method(_SB.INTD._DIS) */ Method(_PRS ,0) { /* DBGO("\\_SB\\LNKD\\_PRS\n") */ - Return(IRQP) + Return (IRQP) } /* Method(_SB.INTD._PRS) */ Method(_CRS ,0) { /* DBGO("\\_SB\\LNKD\\_CRS\n") */ CreateWordField(IRQB, 0x1, IRQN) - ShiftLeft(1, PIRD, IRQN) - Return(IRQB) + IRQN = 1 << PIRD + Return (IRQB) } /* Method(_SB.INTD._CRS) */ Method(_SRS, 1) { @@ -326,9 +326,9 @@ Scope(\_SB) { /* Use lowest available IRQ */ FindSetRightBit(IRQM, Local0) if (Local0) { - Decrement(Local0) + Local0-- } - Store(Local0, PIRD) + PIRD = Local0 } /* End Method(_SB.INTD._SRS) */ } /* End Device(INTD) */ @@ -338,27 +338,27 @@ Scope(\_SB) { Method(_STA, 0) { if (PIRE) { - Return(0x0B) /* sata is invisible */ + Return (0x0b) /* sata is invisible */ } else { - Return(0x09) /* sata is disabled */ + Return (0x09) /* sata is disabled */ } } /* End Method(_SB.INTE._STA) */ Method(_DIS ,0) { /* DBGO("\\_SB\\LNKE\\_DIS\n") */ - Store(0, PIRE) + PIRE = 0 } /* End Method(_SB.INTE._DIS) */ Method(_PRS ,0) { /* DBGO("\\_SB\\LNKE\\_PRS\n") */ - Return(IRQP) + Return (IRQP) } /* Method(_SB.INTE._PRS) */ Method(_CRS ,0) { /* DBGO("\\_SB\\LNKE\\_CRS\n") */ CreateWordField(IRQB, 0x1, IRQN) - ShiftLeft(1, PIRE, IRQN) - Return(IRQB) + IRQN = 1 << PIRE + Return (IRQB) } /* Method(_SB.INTE._CRS) */ Method(_SRS, 1) { @@ -368,9 +368,9 @@ Scope(\_SB) { /* Use lowest available IRQ */ FindSetRightBit(IRQM, Local0) if (Local0) { - Decrement(Local0) + Local0-- } - Store(Local0, PIRE) + PIRE = Local0 } /* End Method(_SB.INTE._SRS) */ } /* End Device(INTE) */ @@ -380,27 +380,27 @@ Scope(\_SB) { Method(_STA, 0) { if (PIRF) { - Return(0x0B) /* sata is invisible */ + Return (0x0b) /* sata is invisible */ } else { - Return(0x09) /* sata is disabled */ + Return (0x09) /* sata is disabled */ } } /* End Method(_SB.INTF._STA) */ Method(_DIS ,0) { /* DBGO("\\_SB\\LNKF\\_DIS\n") */ - Store(0, PIRF) + PIRF = 0 } /* End Method(_SB.INTF._DIS) */ Method(_PRS ,0) { /* DBGO("\\_SB\\LNKF\\_PRS\n") */ - Return(PITF) + Return (PITF) } /* Method(_SB.INTF._PRS) */ Method(_CRS ,0) { /* DBGO("\\_SB\\LNKF\\_CRS\n") */ CreateWordField(IRQB, 0x1, IRQN) - ShiftLeft(1, PIRF, IRQN) - Return(IRQB) + IRQN = 1 << PIRF + Return (IRQB) } /* Method(_SB.INTF._CRS) */ Method(_SRS, 1) { @@ -410,9 +410,9 @@ Scope(\_SB) { /* Use lowest available IRQ */ FindSetRightBit(IRQM, Local0) if (Local0) { - Decrement(Local0) + Local0-- } - Store(Local0, PIRF) + PIRF = Local0 } /* End Method(_SB.INTF._SRS) */ } /* End Device(INTF) */ @@ -422,27 +422,27 @@ Scope(\_SB) { Method(_STA, 0) { if (PIRG) { - Return(0x0B) /* sata is invisible */ + Return (0x0b) /* sata is invisible */ } else { - Return(0x09) /* sata is disabled */ + Return (0x09) /* sata is disabled */ } } /* End Method(_SB.INTG._STA) */ Method(_DIS ,0) { /* DBGO("\\_SB\\LNKG\\_DIS\n") */ - Store(0, PIRG) + PIRG = 0 } /* End Method(_SB.INTG._DIS) */ Method(_PRS ,0) { /* DBGO("\\_SB\\LNKG\\_PRS\n") */ - Return(IRQP) + Return (IRQP) } /* Method(_SB.INTG._CRS) */ Method(_CRS ,0) { /* DBGO("\\_SB\\LNKG\\_CRS\n") */ CreateWordField(IRQB, 0x1, IRQN) - ShiftLeft(1, PIRG, IRQN) - Return(IRQB) + IRQN = 1 << PIRG + Return (IRQB) } /* Method(_SB.INTG._CRS) */ Method(_SRS, 1) { @@ -452,9 +452,9 @@ Scope(\_SB) { /* Use lowest available IRQ */ FindSetRightBit(IRQM, Local0) if (Local0) { - Decrement(Local0) + Local0-- } - Store(Local0, PIRG) + PIRG = Local0 } /* End Method(_SB.INTG._SRS) */ } /* End Device(INTG) */ @@ -464,27 +464,27 @@ Scope(\_SB) { Method(_STA, 0) { if (PIRH) { - Return(0x0B) /* sata is invisible */ + Return (0x0b) /* sata is invisible */ } else { - Return(0x09) /* sata is disabled */ + Return (0x09) /* sata is disabled */ } } /* End Method(_SB.INTH._STA) */ Method(_DIS ,0) { /* DBGO("\\_SB\\LNKH\\_DIS\n") */ - Store(0, PIRH) + PIRH = 0 } /* End Method(_SB.INTH._DIS) */ Method(_PRS ,0) { /* DBGO("\\_SB\\LNKH\\_PRS\n") */ - Return(IRQP) + Return (IRQP) } /* Method(_SB.INTH._CRS) */ Method(_CRS ,0) { /* DBGO("\\_SB\\LNKH\\_CRS\n") */ CreateWordField(IRQB, 0x1, IRQN) - ShiftLeft(1, PIRH, IRQN) - Return(IRQB) + IRQN = 1 << PIRH + Return (IRQB) } /* Method(_SB.INTH._CRS) */ Method(_SRS, 1) { @@ -494,9 +494,9 @@ Scope(\_SB) { /* Use lowest available IRQ */ FindSetRightBit(IRQM, Local0) if (Local0) { - Decrement(Local0) + Local0-- } - Store(Local0, PIRH) + PIRH = Local0 } /* End Method(_SB.INTH._SRS) */ } /* End Device(INTH) */ diff --git a/src/southbridge/amd/cimx/sb800/acpi/smbus.asl b/src/southbridge/amd/cimx/sb800/acpi/smbus.asl index a676893070..b81c5b1c37 100644 --- a/src/southbridge/amd/cimx/sb800/acpi/smbus.asl +++ b/src/southbridge/amd/cimx/sb800/acpi/smbus.asl @@ -19,37 +19,37 @@ OperationRegion (SMB0, SystemIO, 0xB00, 0x0C) } Method (WCLR, 0, NotSerialized) { /* clear SMBUS status register */ - Store (0x1E, HSTS) - Store (0xFA, Local0) - While (LAnd (LNotEqual (And (HSTS, 0x1E), Zero), LGreater (Local0, Zero))) { + HSTS = 0x1e + Local0 = 0xfa + While ((HSTS & 0x1e) != 0) && (Local0 > 0)) { Stall (0x64) - Decrement (Local0) + Local0-- } Return (Local0) } Method (SWTC, 1, NotSerialized) { - Store (Arg0, Local0) - Store (0x07, Local2) - Store (One, Local1) - While (LEqual (Local1, One)) { - Store (And (HSTS, 0x1E), Local3) - If (LNotEqual (Local3, Zero)) { /* read sucess */ - If (LEqual (Local3, 0x02)) { - Store (Zero, Local2) + Local0 = Arg0 + Local2 = 0x07 + Local1 = 1 + While (Local1 == 1) { + Local3 = HSTS & 0x1e + If (Local3 != 0) { /* read success */ + If (Local3 != 0x02) { + Local2 = 0 } - Store (Zero, Local1) + Local1 = 0 } Else { - If (LLess (Local0, 0x0A)) { /* read failure */ - Store (0x10, Local2) - Store (Zero, Local1) + If (Local0 < 0x0A) { /* read failure */ + Local2 = 0x10 + Local1 = 0 } Else { Sleep (0x0A) /* 10 ms, try again */ - Subtract (Local0, 0x0A, Local0) + Local0 -= 0x0a } } } @@ -58,29 +58,29 @@ Method (SWTC, 1, NotSerialized) { } Method (SMBR, 3, NotSerialized) { - Store (0x07, Local0) - If (LEqual (Acquire (SBX0, 0xFFFF), Zero)) { - Store (WCLR (), Local0) /* clear SMBUS status register before read data */ - If (LEqual (Local0, Zero)) { + Local0 = 0x07 + If (Acquire (SBX0, 0xFFFF) == 0) { + Local0 = WCLR () /* clear SMBUS status register before read data */ + If (Local0 == 0) { Release (SBX0) Return (0x0) } - Store (0x1F, HSTS) - Store (Or (ShiftLeft (Arg1, One), One), HADD) - Store (Arg2, HCMD) - If (LEqual (Arg0, 0x07)) { - Store (0x48, HCNT) /* read byte */ + HSTS = 0x1f + HADD = (Arg1 << 1) | 1 + HCMD = Arg2 + If (Arg0 == 0x07) { + HCNT = 0x48 /* read byte */ } - Store (SWTC (0x03E8), Local1) /* 1000 ms */ - If (LEqual (Local1, Zero)) { - If (LEqual (Arg0, 0x07)) { - Store (DAT0, Local0) + Local1 = SWTC (0x03E8) /* 1000 ms */ + If (Local1 == 0) { + If (Arg0 == 0x07) { + Local0 = DAT0 } } Else { - Store (Local1, Local0) + Local0 = Local1 } Release (SBX0) |