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authorEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-08-03 19:42:02 +1000
committerEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-08-13 04:50:00 +0200
commit691ff08e27b9f79e5178a0c3e6c51f9327f207d5 (patch)
treefa3189ec44438273ebb7469054c35f8eefc4a868 /src/southbridge/amd/cimx
parentaaaf689007cb6d80d326e5a297899e6719bdac30 (diff)
downloadcoreboot-691ff08e27b9f79e5178a0c3e6c51f9327f207d5.tar.xz
southbridge/amd/cimx/sb800: Uninitialized variables in config func
Both 'SbSpiSpeedSupport' and 'UsbRxMode' are uninitiated upon return from a 'sb800_cimx_config()' call. Change-Id: I32237ff97fafc3e69627d427e54268dcb039e12c Found-by: Coverity Scan Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6474 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/southbridge/amd/cimx')
-rw-r--r--src/southbridge/amd/cimx/sb800/cfg.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/southbridge/amd/cimx/sb800/cfg.c b/src/southbridge/amd/cimx/sb800/cfg.c
index 78aab799b7..91b6067055 100644
--- a/src/southbridge/amd/cimx/sb800/cfg.c
+++ b/src/southbridge/amd/cimx/sb800/cfg.c
@@ -122,10 +122,13 @@ void sb800_cimx_config(AMDSBCFG *sb_config)
sb_config->SpreadSpectrum = SPREAD_SPECTRUM;
sb_config->PciClks = PCI_CLOCK_CTRL;
sb_config->HpetTimer = HPET_TIMER;
+ sb_config->SbSpiSpeedSupport = 1;
/* USB */
sb_config->USBMODE.UsbModeReg = USB_CONFIG;
sb_config->SbUsbPll = 0;
+ /* CG PLL multiplier for USB Rx 1.1 mode (0=disable, 1=enable) */
+ sb_config->UsbRxMode = 1;
/* SATA */
sb_config->SataClass = SATA_MODE;