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authorAaron Durbin <adurbin@chromium.org>2015-03-16 17:30:09 -0500
committerAaron Durbin <adurbin@google.com>2015-03-18 16:41:43 +0100
commit9ef9d85976fcfc5f4c8c273eaf3377fdd6e5c24d (patch)
treee33c2670ea0188d24bd0dd4b979a18fe1075820f /src/southbridge/amd/cimx
parentb335c3de424c6d80e229c0a79d1e47fd602bfaaa (diff)
downloadcoreboot-9ef9d85976fcfc5f4c8c273eaf3377fdd6e5c24d.tar.xz
bootstate: use structure pointers for scheduling callbacks
The GCC 4.9.2 update showed that the boot_state_init_entry structures were being padded and assumed to be aligned in to an increased size. The bootstate scheduler for static entries, boot_state_schedule_static_entries(), was then calculating the wrong values within the array. To fix this just use a pointer to the boot_state_init_entry structure that needs to be scheduled. In addition to the previous issue noted above, the .bs_init section was sitting in the read only portion of the image while the fields within it need to be writable. Also, the boot_state_schedule_static_entries() was using symbol comparison to terminate a loop which in C can lead the compiler to always evaluate the loop at least once since the language spec indicates no 2 symbols can be the same value. Change-Id: I6dc5331c2979d508dde3cd5c3332903d40d8048b Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/8699 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/southbridge/amd/cimx')
-rw-r--r--src/southbridge/amd/cimx/sb800/late.c5
1 files changed, 1 insertions, 4 deletions
diff --git a/src/southbridge/amd/cimx/sb800/late.c b/src/southbridge/amd/cimx/sb800/late.c
index 2125027083..f4a7aa341a 100644
--- a/src/southbridge/amd/cimx/sb800/late.c
+++ b/src/southbridge/amd/cimx/sb800/late.c
@@ -326,10 +326,7 @@ static void set_pci_irqs(void *unused)
* Hook this function into the PCI state machine
* on entry into BS_DEV_ENABLE.
*/
-BOOT_STATE_INIT_ENTRIES(pci_irq_update) = {
- BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY,
- set_pci_irqs, NULL),
-};
+BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, set_pci_irqs, NULL);
/**
* @brief SB Cimx entry point sbBeforePciInit wrapper