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| author | Furquan Shaikh <furquan@google.com> | 2020-05-02 10:24:23 -0700 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2020-05-02 18:45:16 +0000 |
| commit | 76cedd2c292352d7dbd45fab70ec272e476d0910 (patch) | |
| tree | 21fa0e33a2324e2ab93f38a90f6efd1a49ecdd76 /src/southbridge/amd/cimx | |
| parent | e0844636aca974449c7257e846ec816db683d0b9 (diff) | |
| download | coreboot-76cedd2c292352d7dbd45fab70ec272e476d0910.tar.xz | |
acpi: Move ACPI table support out of arch/x86 (3/5)
This change moves all ACPI table support in coreboot currently living
under arch/x86 into common code to make it architecture
independent. ACPI table generation is not really tied to any
architecture and hence it makes sense to move this to its own
directory.
In order to make it easier to review, this change is being split into
multiple CLs. This is change 3/5 which basically is generated by
running the following command:
$ git grep -iIl "arch/acpi" | xargs sed -i 's/arch\/acpi/acpi\/acpi/g'
BUG=b:155428745
Change-Id: I16b1c45d954d6440fb9db1d3710063a47b582eae
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40938
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Diffstat (limited to 'src/southbridge/amd/cimx')
| -rw-r--r-- | src/southbridge/amd/cimx/sb800/cfg.c | 2 | ||||
| -rw-r--r-- | src/southbridge/amd/cimx/sb800/fadt.c | 2 | ||||
| -rw-r--r-- | src/southbridge/amd/cimx/sb800/late.c | 2 | ||||
| -rw-r--r-- | src/southbridge/amd/cimx/sb800/ramtop.c | 2 |
4 files changed, 4 insertions, 4 deletions
diff --git a/src/southbridge/amd/cimx/sb800/cfg.c b/src/southbridge/amd/cimx/sb800/cfg.c index cf7f3f5fa5..256a9c5b7b 100644 --- a/src/southbridge/amd/cimx/sb800/cfg.c +++ b/src/southbridge/amd/cimx/sb800/cfg.c @@ -5,7 +5,7 @@ #include "cfg.h" #include <OEM.h> -#include <arch/acpi.h> +#include <acpi/acpi.h> /** * @brief South Bridge CIMx configuration diff --git a/src/southbridge/amd/cimx/sb800/fadt.c b/src/southbridge/amd/cimx/sb800/fadt.c index 5cb1695c85..67de34829c 100644 --- a/src/southbridge/amd/cimx/sb800/fadt.c +++ b/src/southbridge/amd/cimx/sb800/fadt.c @@ -9,7 +9,7 @@ #include <string.h> #include <console/console.h> -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <arch/io.h> #include <device/device.h> #include <version.h> diff --git a/src/southbridge/amd/cimx/sb800/late.c b/src/southbridge/amd/cimx/sb800/late.c index e4a1795ab4..b0ee037ae2 100644 --- a/src/southbridge/amd/cimx/sb800/late.c +++ b/src/southbridge/amd/cimx/sb800/late.c @@ -14,7 +14,7 @@ #include <pc80/i8254.h> #include <pc80/i8259.h> #include <console/console.h> /* printk */ -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <device/pci_ehci.h> #include "lpc.h" /* lpc_read_resources */ #include "SBPLATFORM.h" /* Platform Specific Definitions */ diff --git a/src/southbridge/amd/cimx/sb800/ramtop.c b/src/southbridge/amd/cimx/sb800/ramtop.c index 25259eeacf..d25f391b13 100644 --- a/src/southbridge/amd/cimx/sb800/ramtop.c +++ b/src/southbridge/amd/cimx/sb800/ramtop.c @@ -3,7 +3,7 @@ #include <stdint.h> #include <arch/io.h> -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <cbmem.h> #include "SBPLATFORM.h" |