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authorKyösti Mälkki <kyosti.malkki@gmail.com>2014-04-16 09:43:40 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2014-04-20 20:03:55 +0200
commita6c525a7d5ad0dedc31dcc9719be6bc5fbc743dd (patch)
treee789fe63a0581050c35f07806d6854ed7f82d08d /src/southbridge/amd/cimx
parent35546deba642d3bb341d329fc1b9711727a5c50e (diff)
downloadcoreboot-a6c525a7d5ad0dedc31dcc9719be6bc5fbc743dd.tar.xz
AMD AGESA cimx/sb700: Drop APIC_ID_OFFSET and MAX_PHYSICAL_CPUS
Following boards use cimx/sb700: amd/dinar supermicro/h8qgi supermicro/h8scm tyan/s8226 Only amd/dinar had APIC_ID_OFFSET defined, thus all had 0x0. There was a nonsense preprocessor directive (MAX_CPUS * MAX_PHYSICAL_CPUS >= 1). Except for tyan, (MAX_CPUS * MAX_PHYSICAL_CPUS) % 256 == 0. Together with documented 4-bit restriction for APIC ID field, this APIC ID programming matches with MP tables and ACPI tables. I believe this would also fix cases of cimx/sb700 with MAX_CPUS<16, which we do not have in the tree. Change-Id: If8d65e95788ba02fc8d331a7af03a4d0d8cf5c69 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/5539 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/southbridge/amd/cimx')
-rw-r--r--src/southbridge/amd/cimx/sb700/late.c15
1 files changed, 4 insertions, 11 deletions
diff --git a/src/southbridge/amd/cimx/sb700/late.c b/src/southbridge/amd/cimx/sb700/late.c
index b03f13a45f..96050830fb 100644
--- a/src/southbridge/amd/cimx/sb700/late.c
+++ b/src/southbridge/amd/cimx/sb700/late.c
@@ -218,22 +218,15 @@ static void sb700_enable(device_t dev)
case (0x14 << 3) | 0: /* 0:14:0 SMBUS */
{
-#if 1
u32 ioapic_base;
printk(BIOS_DEBUG, "sm_init().\n");
ioapic_base = IO_APIC_ADDR;
clear_ioapic(ioapic_base);
/* I/O APIC IDs are normally limited to 4-bits. Enforce this limit. */
-#if (CONFIG_APIC_ID_OFFSET == 0 && CONFIG_MAX_CPUS * CONFIG_MAX_PHYSICAL_CPUS >= 1)
- /* Assign the ioapic ID the next available number after the processor core local APIC IDs */
- setup_ioapic(ioapic_base, (UINT8) (CONFIG_MAX_CPUS * CONFIG_MAX_PHYSICAL_CPUS));
-#elif (CONFIG_APIC_ID_OFFSET > 0)
- /* Assign the ioapic ID the value 0. Processor APIC IDs follow. */
- setup_ioapic(ioapic_base, 0);
-#else
-#error "The processor APIC IDs must be lifted to make room for the I/O APIC ID"
-#endif
-#endif
+ if (CONFIG_MAX_CPUS >= 16)
+ setup_ioapic(ioapic_base, 0);
+ else
+ setup_ioapic(ioapic_base, CONFIG_MAX_CPUS + 1);
}
break;