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authorElyes HAOUAS <ehaouas@noos.fr>2018-10-17 10:56:26 +0200
committerPatrick Georgi <pgeorgi@google.com>2018-10-23 15:52:09 +0000
commita342f3937e7ce159fd170ab8cd26ba799a3bc9e4 (patch)
tree4bd4540ba11286f465272c1fbee62dbf5f9789f8 /src/southbridge/amd/cimx
parent9856892297ad997f586a1b4dd0a494f3764a0ce2 (diff)
downloadcoreboot-a342f3937e7ce159fd170ab8cd26ba799a3bc9e4.tar.xz
src: Remove unneeded whitespace
Change-Id: I6c77f4289b46646872731ef9c20dc115f0cf876d Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/29161 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/southbridge/amd/cimx')
-rw-r--r--src/southbridge/amd/cimx/sb800/fan.c42
-rw-r--r--src/southbridge/amd/cimx/sb800/smbus.c2
-rw-r--r--src/southbridge/amd/cimx/sb900/smbus.c2
3 files changed, 23 insertions, 23 deletions
diff --git a/src/southbridge/amd/cimx/sb800/fan.c b/src/southbridge/amd/cimx/sb800/fan.c
index 977ffb6f62..db87b6ac87 100644
--- a/src/southbridge/amd/cimx/sb800/fan.c
+++ b/src/southbridge/amd/cimx/sb800/fan.c
@@ -70,7 +70,7 @@ void init_sb800_IMC_fans(struct device *dev)
*
* Device 20, Function 3, Reg 0xA4
* [0]: if 1, the address specified in IMC_PortAddress is used.
- * [15:1] IMC_PortAddress bits 15:1 (0x17 - address 0x2E )
+ * [15:1] IMC_PortAddress bits 15:1 (0x17 - address 0x2E)
*/
pci_write_config16(dev, 0xA4, sb_chip->imc_port_address | 0x01);
@@ -102,7 +102,7 @@ if (sb_chip->imc_fan_zone0_enabled) {
sb_config.Pecstruct.MSGFun81zone0MSGREG0 = 0x00;
sb_config.Pecstruct.MSGFun81zone0MSGREG1 = IMC_ZONE0;
message_ptr = &sb_config.Pecstruct.MSGFun81zone0MSGREG2;
- for (i = 0; i < IMC_FAN_CONFIG_COUNT; i++ )
+ for (i = 0; i < IMC_FAN_CONFIG_COUNT; i++)
*(message_ptr + i) = sb_chip->imc_zone0_config_vals[i];
/* EC LDN9 function 83 zone 0 - Temperature Thresholds */
@@ -110,14 +110,14 @@ if (sb_chip->imc_fan_zone0_enabled) {
sb_config.Pecstruct.MSGFun83zone0MSGREG1 = IMC_ZONE0;
sb_config.Pecstruct.MSGFun83zone0MSGREGB = 0x00;
message_ptr = &sb_config.Pecstruct.MSGFun83zone0MSGREG2;
- for (i = 0; i < IMC_FAN_THRESHOLD_COUNT; i++ )
+ for (i = 0; i < IMC_FAN_THRESHOLD_COUNT; i++)
*(message_ptr + i) = sb_chip->imc_zone0_thresholds[i];
/*EC LDN9 function 85 zone 0 - Fan Speeds */
sb_config.Pecstruct.MSGFun85zone0MSGREG0 = 0x00;
sb_config.Pecstruct.MSGFun85zone0MSGREG1 = IMC_ZONE0;
message_ptr = &sb_config.Pecstruct.MSGFun85zone0MSGREG2;
- for (i = 0; i < IMC_FAN_SPEED_COUNT; i++ )
+ for (i = 0; i < IMC_FAN_SPEED_COUNT; i++)
*(message_ptr + i) = sb_chip->imc_zone0_fanspeeds[i];
}
@@ -133,7 +133,7 @@ if (sb_chip->imc_fan_zone1_enabled) {
sb_config.Pecstruct.MSGFun81zone1MSGREG0 = 0x00;
sb_config.Pecstruct.MSGFun81zone1MSGREG1 = IMC_ZONE1;
message_ptr = &sb_config.Pecstruct.MSGFun81zone1MSGREG2;
- for (i = 0; i < IMC_FAN_CONFIG_COUNT; i++ )
+ for (i = 0; i < IMC_FAN_CONFIG_COUNT; i++)
*(message_ptr + i) = sb_chip->imc_zone1_config_vals[i];
/* EC LDN9 function 83 zone 1 - Temperature Thresholds */
@@ -141,14 +141,14 @@ if (sb_chip->imc_fan_zone1_enabled) {
sb_config.Pecstruct.MSGFun83zone1MSGREG1 = IMC_ZONE1;
sb_config.Pecstruct.MSGFun83zone1MSGREGB = 0x00;
message_ptr = &sb_config.Pecstruct.MSGFun83zone1MSGREG2;
- for (i = 0; i < IMC_FAN_THRESHOLD_COUNT; i++ )
+ for (i = 0; i < IMC_FAN_THRESHOLD_COUNT; i++)
*(message_ptr + i) = sb_chip->imc_zone1_thresholds[i];
/* EC LDN9 function 85 zone 1 - Fan Speeds */
sb_config.Pecstruct.MSGFun85zone1MSGREG0 = 0x00;
sb_config.Pecstruct.MSGFun85zone1MSGREG1 = IMC_ZONE1;
message_ptr = &sb_config.Pecstruct.MSGFun85zone1MSGREG2;
- for (i = 0; i < IMC_FAN_SPEED_COUNT; i++ )
+ for (i = 0; i < IMC_FAN_SPEED_COUNT; i++)
*(message_ptr + i) = sb_chip->imc_zone1_fanspeeds[i];
}
@@ -165,7 +165,7 @@ if (sb_chip->imc_fan_zone2_enabled) {
sb_config.Pecstruct.MSGFun81zone2MSGREG0 = 0x00;
sb_config.Pecstruct.MSGFun81zone2MSGREG1 = IMC_ZONE2;
message_ptr = &sb_config.Pecstruct.MSGFun81zone2MSGREG2;
- for (i = 0; i < IMC_FAN_CONFIG_COUNT; i++ )
+ for (i = 0; i < IMC_FAN_CONFIG_COUNT; i++)
*(message_ptr + i) = sb_chip->imc_zone2_config_vals[i];
/* EC LDN9 function 83 zone 2 */
@@ -173,14 +173,14 @@ if (sb_chip->imc_fan_zone2_enabled) {
sb_config.Pecstruct.MSGFun83zone2MSGREG1 = IMC_ZONE2;
sb_config.Pecstruct.MSGFun83zone2MSGREGB = 0x00;
message_ptr = &sb_config.Pecstruct.MSGFun83zone2MSGREG2;
- for (i = 0; i < IMC_FAN_THRESHOLD_COUNT; i++ )
+ for (i = 0; i < IMC_FAN_THRESHOLD_COUNT; i++)
*(message_ptr + i) = sb_chip->imc_zone2_thresholds[i];
/* EC LDN9 function 85 zone 2 */
sb_config.Pecstruct.MSGFun85zone2MSGREG0 = 0x00;
sb_config.Pecstruct.MSGFun85zone2MSGREG1 = IMC_ZONE2;
message_ptr = &sb_config.Pecstruct.MSGFun85zone2MSGREG2;
- for (i = 0; i < IMC_FAN_SPEED_COUNT; i++ )
+ for (i = 0; i < IMC_FAN_SPEED_COUNT; i++)
*(message_ptr + i) = sb_chip->imc_zone2_fanspeeds[i];
}
@@ -197,7 +197,7 @@ if (sb_chip->imc_fan_zone3_enabled) {
sb_config.Pecstruct.MSGFun81zone3MSGREG0 = 0x00;
sb_config.Pecstruct.MSGFun81zone3MSGREG1 = IMC_ZONE3;
message_ptr = &sb_config.Pecstruct.MSGFun81zone3MSGREG2;
- for (i = 0; i < IMC_FAN_CONFIG_COUNT; i++ )
+ for (i = 0; i < IMC_FAN_CONFIG_COUNT; i++)
*(message_ptr + i) = sb_chip->imc_zone3_config_vals[i];
/* EC LDN9 function 83 zone 3 */
@@ -205,14 +205,14 @@ if (sb_chip->imc_fan_zone3_enabled) {
sb_config.Pecstruct.MSGFun83zone3MSGREG1 = IMC_ZONE3;
sb_config.Pecstruct.MSGFun83zone3MSGREGB = 0x00;
message_ptr = &sb_config.Pecstruct.MSGFun83zone3MSGREG2;
- for (i = 0; i < IMC_FAN_THRESHOLD_COUNT; i++ )
+ for (i = 0; i < IMC_FAN_THRESHOLD_COUNT; i++)
*(message_ptr + i) = sb_chip->imc_zone3_thresholds[i];
/* EC LDN9 function 85 zone 3 */
sb_config.Pecstruct.MSGFun85zone3MSGREG0 = 0x00;
sb_config.Pecstruct.MSGFun85zone3MSGREG1 = IMC_ZONE3;
message_ptr = &sb_config.Pecstruct.MSGFun85zone3MSGREG2;
- for (i = 0; i < IMC_FAN_SPEED_COUNT; i++ )
+ for (i = 0; i < IMC_FAN_SPEED_COUNT; i++)
*(message_ptr + i) = sb_chip->imc_zone3_fanspeeds[i];
}
@@ -231,11 +231,11 @@ if (sb_chip->imc_tempin0_enabled) {
/* EC LDN9 function 89 TEMPIN channel 0 */
sb_config.Pecstruct.MSGFun89zone0MSGREG0 = 0x00;
sb_config.Pecstruct.MSGFun89zone0MSGREG1 = 0x00;
- sb_config.Pecstruct.MSGFun89zone0MSGREG2 = ( sb_chip->imc_tempin0_at & 0xff);
+ sb_config.Pecstruct.MSGFun89zone0MSGREG2 = (sb_chip->imc_tempin0_at & 0xff);
sb_config.Pecstruct.MSGFun89zone0MSGREG3 = ((sb_chip->imc_tempin0_at >> 8) & 0xff);
sb_config.Pecstruct.MSGFun89zone0MSGREG4 = ((sb_chip->imc_tempin0_at >> 16) & 0xff);
sb_config.Pecstruct.MSGFun89zone0MSGREG5 = ((sb_chip->imc_tempin0_at >> 24) & 0xff);
- sb_config.Pecstruct.MSGFun89zone0MSGREG6 = ( sb_chip->imc_tempin0_ct & 0xff);
+ sb_config.Pecstruct.MSGFun89zone0MSGREG6 = (sb_chip->imc_tempin0_ct & 0xff);
sb_config.Pecstruct.MSGFun89zone0MSGREG7 = ((sb_chip->imc_tempin0_ct >> 8) & 0xff);
sb_config.Pecstruct.MSGFun89zone0MSGREG8 = ((sb_chip->imc_tempin0_ct >> 16) & 0xff);
sb_config.Pecstruct.MSGFun89zone0MSGREG9 = ((sb_chip->imc_tempin0_ct >> 24) & 0xff);
@@ -249,11 +249,11 @@ if (sb_chip->imc_tempin1_enabled) {
/* EC LDN9 function 89 TEMPIN channel 1 */
sb_config.Pecstruct.MSGFun89zone1MSGREG0 = 0x00;
sb_config.Pecstruct.MSGFun89zone1MSGREG1 = 0x01;
- sb_config.Pecstruct.MSGFun89zone1MSGREG2 = ( sb_chip->imc_tempin1_at & 0xff);
+ sb_config.Pecstruct.MSGFun89zone1MSGREG2 = (sb_chip->imc_tempin1_at & 0xff);
sb_config.Pecstruct.MSGFun89zone1MSGREG3 = ((sb_chip->imc_tempin1_at >> 8) & 0xff);
sb_config.Pecstruct.MSGFun89zone1MSGREG4 = ((sb_chip->imc_tempin1_at >> 16) & 0xff);
sb_config.Pecstruct.MSGFun89zone1MSGREG5 = ((sb_chip->imc_tempin1_at >> 24) & 0xff);
- sb_config.Pecstruct.MSGFun89zone1MSGREG6 = ( sb_chip->imc_tempin1_ct & 0xff);
+ sb_config.Pecstruct.MSGFun89zone1MSGREG6 = (sb_chip->imc_tempin1_ct & 0xff);
sb_config.Pecstruct.MSGFun89zone1MSGREG7 = ((sb_chip->imc_tempin1_ct >> 8) & 0xff);
sb_config.Pecstruct.MSGFun89zone1MSGREG8 = ((sb_chip->imc_tempin1_ct >> 16) & 0xff);
sb_config.Pecstruct.MSGFun89zone1MSGREG9 = ((sb_chip->imc_tempin1_ct >> 24) & 0xff);
@@ -267,11 +267,11 @@ if (sb_chip->imc_tempin2_enabled) {
/* EC LDN9 function 89 TEMPIN channel 2 */
sb_config.Pecstruct.MSGFun89zone2MSGREG0 = 0x00;
sb_config.Pecstruct.MSGFun89zone2MSGREG1 = 0x02;
- sb_config.Pecstruct.MSGFun89zone2MSGREG2 = ( sb_chip->imc_tempin2_at & 0xff);
+ sb_config.Pecstruct.MSGFun89zone2MSGREG2 = (sb_chip->imc_tempin2_at & 0xff);
sb_config.Pecstruct.MSGFun89zone2MSGREG3 = ((sb_chip->imc_tempin2_at >> 8) & 0xff);
sb_config.Pecstruct.MSGFun89zone2MSGREG4 = ((sb_chip->imc_tempin2_at >> 16) & 0xff);
sb_config.Pecstruct.MSGFun89zone2MSGREG5 = ((sb_chip->imc_tempin2_at >> 24) & 0xff);
- sb_config.Pecstruct.MSGFun89zone2MSGREG6 = ( sb_chip->imc_tempin2_ct & 0xff);
+ sb_config.Pecstruct.MSGFun89zone2MSGREG6 = (sb_chip->imc_tempin2_ct & 0xff);
sb_config.Pecstruct.MSGFun89zone2MSGREG7 = ((sb_chip->imc_tempin2_ct >> 8) & 0xff);
sb_config.Pecstruct.MSGFun89zone2MSGREG8 = ((sb_chip->imc_tempin2_ct >> 16) & 0xff);
sb_config.Pecstruct.MSGFun89zone2MSGREG9 = ((sb_chip->imc_tempin2_ct >> 24) & 0xff);
@@ -285,11 +285,11 @@ if (sb_chip->imc_tempin3_enabled) {
/* EC LDN9 function 89 TEMPIN channel 3 */
sb_config.Pecstruct.MSGFun89zone3MSGREG0 = 0x00;
sb_config.Pecstruct.MSGFun89zone3MSGREG1 = 0x03;
- sb_config.Pecstruct.MSGFun89zone3MSGREG2 = ( sb_chip->imc_tempin3_at & 0xff);
+ sb_config.Pecstruct.MSGFun89zone3MSGREG2 = (sb_chip->imc_tempin3_at & 0xff);
sb_config.Pecstruct.MSGFun89zone3MSGREG3 = ((sb_chip->imc_tempin3_at >> 8) & 0xff);
sb_config.Pecstruct.MSGFun89zone3MSGREG4 = ((sb_chip->imc_tempin3_at >> 16) & 0xff);
sb_config.Pecstruct.MSGFun89zone3MSGREG5 = ((sb_chip->imc_tempin3_at >> 24) & 0xff);
- sb_config.Pecstruct.MSGFun89zone3MSGREG6 = ( sb_chip->imc_tempin3_ct & 0xff);
+ sb_config.Pecstruct.MSGFun89zone3MSGREG6 = (sb_chip->imc_tempin3_ct & 0xff);
sb_config.Pecstruct.MSGFun89zone3MSGREG7 = ((sb_chip->imc_tempin3_ct >> 8) & 0xff);
sb_config.Pecstruct.MSGFun89zone3MSGREG8 = ((sb_chip->imc_tempin3_ct >> 16) & 0xff);
sb_config.Pecstruct.MSGFun89zone3MSGREG9 = ((sb_chip->imc_tempin3_ct >> 24) & 0xff);
diff --git a/src/southbridge/amd/cimx/sb800/smbus.c b/src/southbridge/amd/cimx/sb800/smbus.c
index 53b0a13977..a4426ff431 100644
--- a/src/southbridge/amd/cimx/sb800/smbus.c
+++ b/src/southbridge/amd/cimx/sb800/smbus.c
@@ -233,7 +233,7 @@ void alink_rc_indx(u32 reg_space, u32 reg_addr, u32 port, u32 mask, u32 val)
/* space = 0: AX_INDXC, AX_DATAC
* space = 1: AX_INDXP, AX_DATAP
*/
-void alink_ax_indx(u32 space /*c or p? */ , u32 axindc, u32 mask, u32 val)
+void alink_ax_indx(u32 space /*c or p? */, u32 axindc, u32 mask, u32 val)
{
u32 tmp;
diff --git a/src/southbridge/amd/cimx/sb900/smbus.c b/src/southbridge/amd/cimx/sb900/smbus.c
index aaa09686bc..389aa8e12d 100644
--- a/src/southbridge/amd/cimx/sb900/smbus.c
+++ b/src/southbridge/amd/cimx/sb900/smbus.c
@@ -233,7 +233,7 @@ void alink_rc_indx(u32 reg_space, u32 reg_addr, u32 port, u32 mask, u32 val)
/* space = 0: AX_INDXC, AX_DATAC
* space = 1: AX_INDXP, AX_DATAP
*/
-void alink_ax_indx(u32 space /*c or p? */ , u32 axindc, u32 mask, u32 val)
+void alink_ax_indx(u32 space /*c or p? */, u32 axindc, u32 mask, u32 val)
{
u32 tmp;