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authorNico Huber <nico.h@gmx.de>2018-10-11 22:54:25 +0200
committerNico Huber <nico.h@gmx.de>2018-10-31 15:29:42 +0000
commit718c6faff4acf7a7716a1747fbfecdac462ef2c9 (patch)
tree7519bc51b016761d4c068a9e71ab908d5e32a011 /src/southbridge/amd/common/reset.h
parent30cf14ff3fdd9fbbaa3ffb841359c2ee1a0bfcad (diff)
downloadcoreboot-718c6faff4acf7a7716a1747fbfecdac462ef2c9.tar.xz
reset: Finalize move to new API
Move soft_reset() to `southbridge/amd/common/` it's only used for amdfam10 now. Drop hard_reset() for good. Change-Id: Ifdc5791160653c5578007f6c1b96015efe2b3e1e Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/29059 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/southbridge/amd/common/reset.h')
-rw-r--r--src/southbridge/amd/common/reset.h35
1 files changed, 35 insertions, 0 deletions
diff --git a/src/southbridge/amd/common/reset.h b/src/southbridge/amd/common/reset.h
new file mode 100644
index 0000000000..ce101cb2dc
--- /dev/null
+++ b/src/southbridge/amd/common/reset.h
@@ -0,0 +1,35 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2017 Google, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _AMD_SB_RESET_H_
+#define _AMD_SB_RESET_H_
+
+#include <arch/cache.h>
+#include <console/console.h>
+#include <halt.h>
+
+/* Implement the bare reset, e.g. write to cf9. */
+void do_soft_reset(void);
+
+/* Prepare for reset, run do_soft_reset(), halt. */
+static inline __noreturn void soft_reset(void)
+{
+ printk(BIOS_INFO, "%s() called!\n", __func__);
+ dcache_clean_all();
+ do_soft_reset();
+ halt();
+}
+
+#endif /* _AMD_SB_RESET_H_ */