Now coreboot performs IRQ routing for some boards.

You can see this by executing commands like this:
grep -r pci_assign_irqs coreboot/src/*

This basically AMD/LX based boards: pcengines/alix1c,
digitallogic/msm800sev, artecgroup/dbe61, amd/norwich, amd/db800.

Also for AMD/GX1 based boards need a patch
[http://www.pengutronix.de/software/ptxdist/temporary-src/references/geode-5530.patch]
for the right IRQ setup.
AMD/GX1 based boards is: advantech/pcm-5820, asi/mb_5blmp, axus/tc320,
bcom/winnet100, eaglelion/5bcm, iei/nova4899r, iei/juki-511p.

I have two ideas.
1. Delete duplicate code from AMD/LX based boards.
2. Add IRQ routing for AMD/GX1 boards in coreboot.

The pirq.patch for IRQ routing logically consist from of two parts:

First part of pirq.patch independent from type chipsets and assign IRQ for
ever PCI device. It part based on AMD/LX write_pirq_routing_table() function.

Second part of pirq.patch depends of type chipset and set PIRQx lines
in interrupt router. This part supports only CS5530/5536 interrupt routers.

IRQ routing functionality is included through PIRQ_ROUTE in Config.lb.

Tested on iei/juki-511p(cs5530a), iei/pcisa-lx(cs5536) and also on
TeleVideo TC7020, see
http://www.coreboot.org/pipermail/coreboot/2007-December/027973.html.

Signed-off-by: Nikolay Petukhov <nikolay.petukhov@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3196 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

2 files changed, 40 insertions, 0 deletions

diff --git a/src/southbridge/amd/cs5530/Config.lb b/src/southbridge/amd/cs5530/Config.lb
index 8028f756b3..9a3ae5feb3 100644
--- a/src/southbridge/amd/cs5530/Config.lb
+++ b/src/southbridge/amd/cs5530/Config.lb
@@ -23,3 +23,4 @@ driver cs5530.o
 driver cs5530_isa.o
 driver cs5530_ide.o
 driver cs5530_vga.o
+driver cs5530_pirq.o
diff --git a/src/southbridge/amd/cs5530/cs5530_pirq.c b/src/southbridge/amd/cs5530/cs5530_pirq.c
new file mode 100644
index 0000000000..edae7c9ab6
--- /dev/null
+++ b/src/southbridge/amd/cs5530/cs5530_pirq.c
@@ -0,0 +1,39 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2007 Nikolay Petukhov <nikolay.petukhov@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+#include <arch/pirq_routing.h>
+#include <console/console.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+
+#if (PIRQ_ROUTE==1 && HAVE_PIRQ_TABLE==1)
+void pirq_assign_irqs(const unsigned char pIntAtoD[4])
+{
+	device_t pdev;
+
+	pdev = dev_find_device(PCI_VENDOR_ID_CYRIX,
+			       PCI_DEVICE_ID_CYRIX_5530_LEGACY, 0);
+
+	if (pdev) {
+		pci_write_config8(pdev, 0x5c, (pIntAtoD[1] << 4 | pIntAtoD[0]));
+		pci_write_config8(pdev, 0x5d, (pIntAtoD[3] << 4 | pIntAtoD[2]));
+	}
+}
+#endif