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authorLi-Ta Lo <ollie@lanl.gov>2006-04-20 21:21:25 +0000
committerLi-Ta Lo <ollie@lanl.gov>2006-04-20 21:21:25 +0000
commitbc5a821f1e19153f4a11b29fca196f686b2f4885 (patch)
tree3bb5ed7831459453a0962b2cb9a7c1f853f2a330 /src/southbridge/amd/cs5535/chip.h
parent5c97d78b1ac62276ae6f08b5f96f5ccb05e4d2f4 (diff)
downloadcoreboot-bc5a821f1e19153f4a11b29fca196f686b2f4885.tar.xz
add cs5536 directory
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2262 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/amd/cs5535/chip.h')
-rw-r--r--src/southbridge/amd/cs5535/chip.h14
1 files changed, 6 insertions, 8 deletions
diff --git a/src/southbridge/amd/cs5535/chip.h b/src/southbridge/amd/cs5535/chip.h
index 07a3907f3f..3e9be9938e 100644
--- a/src/southbridge/amd/cs5535/chip.h
+++ b/src/southbridge/amd/cs5535/chip.h
@@ -1,12 +1,10 @@
-#ifndef _SOUTHBRIDGE_AMD_CS5535
-#define _SOUTHBRIDGE_AMD_CS5535
+#ifndef _SOUTHBRIDGE_AMD_CS5536
+#define _SOUTHBRIDGE_AMD_CS5536
-extern struct chip_operations southbridge_amd_cs5535_ops;
+extern struct chip_operations southbridge_amd_cs5536_ops;
-struct southbridge_amd_cs5535_config {
- /* PCI function enables so the pci scan bus finds the devices */
- int enable_ide;
- int enable_nvram;
+struct southbridge_amd_cs5536_config {
+ int none;
};
-#endif /* _SOUTHBRIDGE_AMD_CS5535 */
+#endif /* _SOUTHBRIDGE_AMD_CS5536 */