diff options
author | Martin Roth <gaumless@gmail.com> | 2017-10-15 14:16:37 -0600 |
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committer | Martin Roth <martinroth@google.com> | 2018-01-15 23:22:59 +0000 |
commit | 99c45dee0ae62254be36a312d67764784450b564 (patch) | |
tree | 193b20bb742056464374373ba65b07bc901f07c7 /src/southbridge/amd/cs5535/cs5535.c | |
parent | b94b2c73068eba434cdd162fac1d50cf22524259 (diff) | |
download | coreboot-99c45dee0ae62254be36a312d67764784450b564.tar.xz |
AMD GX2 boards & chips: Remove - using LATE_CBMEM_INIT
All boards and chips that are still using LATE_CBMEM_INIT are being
removed as previously discussed.
If these boards and chips are updated to not use LATE_CBMEM_INIT, they
can be restored to the active codebase from the 4.7 branch.
chips:
cpu/amd/geode_gx2
northbridge/amd/gx2
southbridge/amd/cs5535
Mainboards:
mainboard/amd/rumba
mainboard/lippert/frontrunner
mainboard/wyse/s50
Change-Id: I81c130f53bbfa001edbfdb7a878ef115757f620c
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/22025
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/southbridge/amd/cs5535/cs5535.c')
-rw-r--r-- | src/southbridge/amd/cs5535/cs5535.c | 111 |
1 files changed, 0 insertions, 111 deletions
diff --git a/src/southbridge/amd/cs5535/cs5535.c b/src/southbridge/amd/cs5535/cs5535.c deleted file mode 100644 index 67d7eee334..0000000000 --- a/src/southbridge/amd/cs5535/cs5535.c +++ /dev/null @@ -1,111 +0,0 @@ - -#include <arch/io.h> -#include <arch/ioapic.h> -#include <device/device.h> -#include <device/pci.h> -#include <device/pci_ops.h> -#include <device/pci_ids.h> -#include <console/console.h> -#include "cs5535.h" - -static void nvram_on(struct device *dev) -{ -#if 0 - volatile char *flash = (volatile unsigned char *)0xFFFc0000; - unsigned char id1, id2; -#endif - unsigned char reg; - - /* Enable writes to flash at top of memory */ - pci_write_config8(dev, 0x52, 0xee); - - /* Set positive decode on ROM */ - /* Also, there is no apparent reason to turn off the device on the */ - /* IDE devices */ - - reg = pci_read_config8(dev, 0x5b); - reg |= 1 << 5; /* ROM Decode */ - reg |= 1 << 3; /* Primary IDE decode */ - reg |= 1 << 4; /* Secondary IDE decode */ - - pci_write_config8(dev, 0x5b, reg); - -#if 0 // just to test if the flash is accessible! - *(flash + 0x555) = 0xaa; - *(flash + 0x2aa) = 0x55; - *(flash + 0x555) = 0x90; - - id1 = *(volatile unsigned char *) flash; - id2 = *(volatile unsigned char *) (flash + 1); - - *flash = 0xf0; - - printk(BIOS_DEBUG, "Flash device: MFGID %02x, DEVID %02x\n", id1, id2); -#endif -} - - -static void southbridge_init(struct device *dev) -{ - printk(BIOS_SPEW, "cs5535: %s\n", __func__); - nvram_on(dev); -} - -/* -static void dump_south(struct device *dev) -{ - int i, j; - - for (i = 0; i < 256; i+=16) { - printk(BIOS_DEBUG, "0x%02x:", i); - for (j = 0; j < 16; j++) - printk(BIOS_DEBUG, " %02x", pci_read_config8(dev, i+j)); - printk(BIOS_DEBUG, "\n"); - } -} -*/ - -static void southbridge_enable(struct device *dev) -{ - printk(BIOS_SPEW, "%s: dev is %p\n", __func__, dev); -} - -static void cs5535_read_resources(device_t dev) -{ - struct resource *res; - - pci_dev_read_resources(dev); - - res = new_resource(dev, 1); - res->base = 0x0UL; - res->size = 0x1000UL; - res->limit = 0xffffUL; - res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; - - res = new_resource(dev, 3); /* IOAPIC */ - res->base = IO_APIC_ADDR; - res->size = 0x00001000; - res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; -} - -static struct device_operations southbridge_ops = { - .read_resources = cs5535_read_resources, - .set_resources = pci_dev_set_resources, - .enable_resources = pci_dev_enable_resources, - .init = southbridge_init, - .enable = southbridge_enable, -}; - -static const struct pci_driver cs5535_pci_driver __pci_driver = { - .ops = &southbridge_ops, - .vendor = PCI_VENDOR_ID_NS, - .device = PCI_DEVICE_ID_NS_CS5535 -}; - -struct chip_operations southbridge_amd_cs5535_ops = { - CHIP_NAME("AMD Geode CS5535 Southbridge") - /* This is only called when this device is listed in the - * static device tree. - */ - .enable_dev = southbridge_enable, -}; |