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authorStefan Reinauer <stepan@coresystems.de>2010-04-27 06:56:47 +0000
committerStefan Reinauer <stepan@openbios.org>2010-04-27 06:56:47 +0000
commit14e22779625de673569c7b950ecc2753fb915b31 (patch)
tree14a6ed759e116e9e6e9bbd7f499b74b96d6cc072 /src/southbridge/amd/cs5535
parent0e1e8065e303030c39c3f2c27e5d32ee58a16c66 (diff)
downloadcoreboot-14e22779625de673569c7b950ecc2753fb915b31.tar.xz
Since some people disapprove of white space cleanups mixed in regular commits
while others dislike them being extra commits, let's clean them up once and for all for the existing code. If it's ugly, let it only be ugly once :-) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5507 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/amd/cs5535')
-rw-r--r--src/southbridge/amd/cs5535/cs5535.c4
-rw-r--r--src/southbridge/amd/cs5535/cs5535_early_setup.c4
-rw-r--r--src/southbridge/amd/cs5535/cs5535_early_smbus.c2
-rw-r--r--src/southbridge/amd/cs5535/cs5535_smbus.h6
4 files changed, 8 insertions, 8 deletions
diff --git a/src/southbridge/amd/cs5535/cs5535.c b/src/southbridge/amd/cs5535/cs5535.c
index 6f203558e3..50b62df0c3 100644
--- a/src/southbridge/amd/cs5535/cs5535.c
+++ b/src/southbridge/amd/cs5535/cs5535.c
@@ -21,7 +21,7 @@ static void nvram_on(struct device *dev)
/* Set positive decode on ROM */
/* Also, there is no apparent reason to turn off the devoce on the */
/* IDE devices */
-
+
reg = pci_read_config8(dev, 0x5b);
reg |= 1 << 5; /* ROM Decode */
reg |= 1 << 3; /* Primary IDE decode */
@@ -43,7 +43,7 @@ static void nvram_on(struct device *dev)
#endif
}
-
+
static void southbridge_init(struct device *dev)
{
printk(BIOS_SPEW, "cs5535: %s\n", __func__);
diff --git a/src/southbridge/amd/cs5535/cs5535_early_setup.c b/src/southbridge/amd/cs5535/cs5535_early_setup.c
index fbb3647578..91dc852012 100644
--- a/src/southbridge/amd/cs5535/cs5535_early_setup.c
+++ b/src/southbridge/amd/cs5535/cs5535_early_setup.c
@@ -8,13 +8,13 @@
*
*/
-#define CS5535_GLINK_PORT_NUM 0x02 /* the geode link port number to the CS5535 */
+#define CS5535_GLINK_PORT_NUM 0x02 /* the geode link port number to the CS5535 */
#define CS5535_DEV_NUM 0x0F /* default PCI device number for CS5535 */
/**
* @brief Setup PCI IDSEL for CS5535
*
- *
+ *
*/
static void cs5535_setup_extmsr(void)
diff --git a/src/southbridge/amd/cs5535/cs5535_early_smbus.c b/src/southbridge/amd/cs5535/cs5535_early_smbus.c
index 6ff46338f6..ec801f02a8 100644
--- a/src/southbridge/amd/cs5535/cs5535_early_smbus.c
+++ b/src/southbridge/amd/cs5535/cs5535_early_smbus.c
@@ -18,7 +18,7 @@ static int cs5535_enable_smbus(void)
/* Setup SMBus host controller address to 0xEF */
val = inb(SMBUS_IO_BASE + SMB_ADD);
val |= (0xEF | SMB_ADD_SAEN);
- outb(val, SMBUS_IO_BASE + SMB_ADD);
+ outb(val, SMBUS_IO_BASE + SMB_ADD);
}
static int smbus_read_byte(unsigned device, unsigned address)
diff --git a/src/southbridge/amd/cs5535/cs5535_smbus.h b/src/southbridge/amd/cs5535/cs5535_smbus.h
index 9cf55ba29c..799e226f5e 100644
--- a/src/southbridge/amd/cs5535/cs5535_smbus.h
+++ b/src/southbridge/amd/cs5535/cs5535_smbus.h
@@ -105,7 +105,7 @@ static int smbus_send_slave_address(unsigned smbus_io_base, unsigned char device
unsigned char val;
unsigned long loops;
loops = SMBUS_TIMEOUT;
-
+
/* send the slave address */
outb(device, smbus_io_base + SMB_SDA);
@@ -123,7 +123,7 @@ static int smbus_send_slave_address(unsigned smbus_io_base, unsigned char device
break;
}
} while(--loops);
- return loops?0:SMBUS_WAIT_UNTIL_READY_TIMEOUT;
+ return loops?0:SMBUS_WAIT_UNTIL_READY_TIMEOUT;
}
static int smbus_send_command(unsigned smbus_io_base, unsigned char command)
@@ -149,7 +149,7 @@ static int smbus_send_command(unsigned smbus_io_base, unsigned char command)
break;
}
} while(--loops);
- return loops?0:SMBUS_WAIT_UNTIL_READY_TIMEOUT;
+ return loops?0:SMBUS_WAIT_UNTIL_READY_TIMEOUT;
}
static unsigned char do_smbus_read_byte(unsigned smbus_io_base, unsigned char device, unsigned char address)