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authorChristian Gmeiner <christian.gmeiner@gmail.com>2012-07-20 10:21:29 +0200
committerPatrick Georgi <patrick@georgi-clan.de>2012-07-24 12:18:28 +0200
commitb5dfcae09728d38d8049e348a2b7654087b3a734 (patch)
tree67bbf317e5dd625989e2677bccc88a12134f9a63 /src/southbridge/amd/cs5536/Makefile.inc
parentfa418e3c66ca1728f41bd5811a77dcb14253441c (diff)
downloadcoreboot-b5dfcae09728d38d8049e348a2b7654087b3a734.tar.xz
cs5536: add smbus support in ramstage
With this patch it is possible to use the smbus in ramstage. The biggest part of the patch is a simple code split into a general part (smbus.h) and the concrete users (early_smbus.c and cs5536.c). After the switch from romstage to ramstage the smb base address has changed, but that is no problem as the new base address is stored in bar0 of the ISA bridge. It could also be read via msr, but via PCI it is simpler. I used the following patch as reference on how to readout the new base address: http://lists.laptop.org/pipermail/commits-kernel/2006-November/000178.html Change-Id: I9f86a1e474368c62f9ed3a95edfb3e63117aa156 Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-on: http://review.coreboot.org/1243 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com> Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/southbridge/amd/cs5536/Makefile.inc')
-rw-r--r--src/southbridge/amd/cs5536/Makefile.inc2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/southbridge/amd/cs5536/Makefile.inc b/src/southbridge/amd/cs5536/Makefile.inc
index 75c6e5c930..3d2613b4ce 100644
--- a/src/southbridge/amd/cs5536/Makefile.inc
+++ b/src/southbridge/amd/cs5536/Makefile.inc
@@ -20,3 +20,5 @@
driver-y += cs5536.c
driver-y += ide.c
driver-y += pirq.c
+driver-y += smbus.c
+romstage-y += smbus.c \ No newline at end of file