diff options
| author | Ronald G. Minnich <rminnich@gmail.com> | 2006-05-02 03:07:11 +0000 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2006-05-02 03:07:11 +0000 |
| commit | d3ba4aaa245b1af50f70443ba01ec0baf883995f (patch) | |
| tree | 86ef1da57a3c72ff0c83f8429b74d13a6c1cb7b6 /src/southbridge/amd/cs5536/cs5536.c | |
| parent | ae3cbe951b414d9c2d2338f77e00132f7251cf94 (diff) | |
| download | coreboot-d3ba4aaa245b1af50f70443ba01ec0baf883995f.tar.xz | |
Fall back to pre-broken settings and setup for GX2.
We lost a few things, but this is still worth it.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2287 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/amd/cs5536/cs5536.c')
| -rw-r--r-- | src/southbridge/amd/cs5536/cs5536.c | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/southbridge/amd/cs5536/cs5536.c b/src/southbridge/amd/cs5536/cs5536.c index ebe99cf395..37c54d5c50 100644 --- a/src/southbridge/amd/cs5536/cs5536.c +++ b/src/southbridge/amd/cs5536/cs5536.c @@ -29,13 +29,11 @@ static void southbridge_enable(struct device *dev) msr.lo = sb->lpc_serirq_enable; msr.hi = 0; wrmsr(MDD_LPC_SIRQ, msr); - printk_debug("Enabled LPC SERIRQ 0x%x\n", msr.lo); } if (sb->lpc_irq) { msr.lo = sb->lpc_irq; msr.hi = 0; wrmsr(MDD_IRQM_LPC, msr); - printk_debug("Enabled lpc irq values 0x%x\n", msr.lo); } if (sb->enable_gpio0_inta){ @@ -49,7 +47,6 @@ static void southbridge_enable(struct device *dev) /* magic stuff */ outl(0x3081, GPIOL_INPUT_INVERT_ENABLE); outl(GPIOL_0_SET, GPIO_MAPPER_X); - printk_debug("Enabled GPIO0 INTa\n"); } |