diff options
| author | Myles Watson <mylesgw@gmail.com> | 2009-07-02 18:56:24 +0000 |
|---|---|---|
| committer | Myles Watson <mylesgw@gmail.com> | 2009-07-02 18:56:24 +0000 |
| commit | 29cc9eda2021a87396ef31a6fc81daff6fd1be7a (patch) | |
| tree | d3dfa07ca85547c77c5d07825fc8afcc19489076 /src/southbridge/amd/cs5536/cs5536.c | |
| parent | 2468331952bae0abdc4d76dbe6cf26f05b7825e5 (diff) | |
| download | coreboot-29cc9eda2021a87396ef31a6fc81daff6fd1be7a.tar.xz | |
Move the v3 resource allocator to v2.
Major changes:
1. Separate resource allocation into:
A. Read Resources
B. Avoid fixed resources (constrain limits)
C. Allocate resources
D. Set resources
Usage notes:
Resources which have IORESOURCE_FIXED set in the flags constrain the placement
of other resources. All fixed resources will end up outside (above or below)
the allocated resources.
Domains usually start with base = 0 and limit = 2^address_bits - 1.
I've added an IOAPIC to all platforms so that the old limit of 0xfec00000 is
still there for resources. Some platforms may want to change that, but I didn't
want to break anyone's board.
Resources are allocated in a single block for memory and another for I/O.
Currently the resource allocator doesn't support holes.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4394 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/amd/cs5536/cs5536.c')
| -rw-r--r-- | src/southbridge/amd/cs5536/cs5536.c | 21 |
1 files changed, 20 insertions, 1 deletions
diff --git a/src/southbridge/amd/cs5536/cs5536.c b/src/southbridge/amd/cs5536/cs5536.c index 4169275b6f..002335d6b2 100644 --- a/src/southbridge/amd/cs5536/cs5536.c +++ b/src/southbridge/amd/cs5536/cs5536.c @@ -607,6 +607,25 @@ static void southbridge_init(struct device *dev) } } +static void cs5536_read_resources(device_t dev) +{ + struct resource *res; + + pci_dev_read_resources(dev); + + res = new_resource(dev, 1); + res->base = 0x0UL; + res->size = 0x400UL; + res->limit = 0xffffUL; + res->flags = IORESOURCE_IO | + IORESOURCE_ASSIGNED | IORESOURCE_FIXED; + + res = new_resource(dev, 3); /* IOAPIC */ + res->base = 0xfec00000; + res->size = 0x00001000; + res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; +} + static void southbridge_enable(struct device *dev) { printk_err("cs5536: %s: dev is %p\n", __func__, dev); @@ -621,7 +640,7 @@ static void cs5536_pci_dev_enable_resources(device_t dev) } static struct device_operations southbridge_ops = { - .read_resources = pci_dev_read_resources, + .read_resources = cs5536_read_resources, .set_resources = pci_dev_set_resources, .enable_resources = cs5536_pci_dev_enable_resources, .init = southbridge_init, |