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| author | Li-Ta Lo <ollie@lanl.gov> | 2006-04-27 18:40:15 +0000 |
|---|---|---|
| committer | Li-Ta Lo <ollie@lanl.gov> | 2006-04-27 18:40:15 +0000 |
| commit | c1a4b2b0e56d5c12622e5c0841cabf599311c896 (patch) | |
| tree | 7eab97235845760adf42b721ed4bf3b4cfc60a5d /src/southbridge/amd/cs5536/cs5536_early_setup.c | |
| parent | b947b147348ee31285637e1c4f08c6e52e512f4d (diff) | |
| download | coreboot-c1a4b2b0e56d5c12622e5c0841cabf599311c896.tar.xz | |
code cleanup, comments added
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2284 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/amd/cs5536/cs5536_early_setup.c')
| -rw-r--r-- | src/southbridge/amd/cs5536/cs5536_early_setup.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/amd/cs5536/cs5536_early_setup.c b/src/southbridge/amd/cs5536/cs5536_early_setup.c index eb8f9f5140..d66802076d 100644 --- a/src/southbridge/amd/cs5536/cs5536_early_setup.c +++ b/src/southbridge/amd/cs5536/cs5536_early_setup.c @@ -165,7 +165,7 @@ static int cs5536_setup_onchipuart(void) * MSR 0x51400014 bit 18:16 * 3. Enable UART controller * MSR 0x5140003A bit 0, 1 - * 4. IRQ routing on IRQ Mapper + * 4. IRQ routing on IRQ Mapper (before loading OS) * MSR 0x51400021 bit [27:24] */ msr_t msr; |