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| author | Ronald G. Minnich <rminnich@gmail.com> | 2006-05-02 03:07:11 +0000 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2006-05-02 03:07:11 +0000 |
| commit | d3ba4aaa245b1af50f70443ba01ec0baf883995f (patch) | |
| tree | 86ef1da57a3c72ff0c83f8429b74d13a6c1cb7b6 /src/southbridge/amd/cs5536/cs5536_early_setup.c | |
| parent | ae3cbe951b414d9c2d2338f77e00132f7251cf94 (diff) | |
| download | coreboot-d3ba4aaa245b1af50f70443ba01ec0baf883995f.tar.xz | |
Fall back to pre-broken settings and setup for GX2.
We lost a few things, but this is still worth it.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2287 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/amd/cs5536/cs5536_early_setup.c')
| -rw-r--r-- | src/southbridge/amd/cs5536/cs5536_early_setup.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/amd/cs5536/cs5536_early_setup.c b/src/southbridge/amd/cs5536/cs5536_early_setup.c index d66802076d..eb8f9f5140 100644 --- a/src/southbridge/amd/cs5536/cs5536_early_setup.c +++ b/src/southbridge/amd/cs5536/cs5536_early_setup.c @@ -165,7 +165,7 @@ static int cs5536_setup_onchipuart(void) * MSR 0x51400014 bit 18:16 * 3. Enable UART controller * MSR 0x5140003A bit 0, 1 - * 4. IRQ routing on IRQ Mapper (before loading OS) + * 4. IRQ routing on IRQ Mapper * MSR 0x51400021 bit [27:24] */ msr_t msr; |