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| author | Marc Jones <marcj303@gmail.com> | 2017-04-05 10:34:33 -0600 |
|---|---|---|
| committer | Marc Jones <marc@marcjonesconsulting.com> | 2017-04-26 02:23:11 +0200 |
| commit | e7394ca90366d35ac52416c21052a3ceb459dc81 (patch) | |
| tree | a54c1fb5ff5d352f3ae68bcf94c45bbf4564389d /src/southbridge/amd/pi/hudson | |
| parent | f962aa52d626f997f7749b4566e5fefca97ebcf2 (diff) | |
| download | coreboot-e7394ca90366d35ac52416c21052a3ceb459dc81.tar.xz | |
amd/pi/hudson: Move ACPI IO registers
Move the ACPI IO registers from 0x800 to 0x600 to avoid the
IO space required by the Google EC, also at 0x800.
This shouldn't have any conflicts on other AMD systems.
Change-Id: Iac7388c15e899277fd506fb37965164488358335
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/19171
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/southbridge/amd/pi/hudson')
| -rw-r--r-- | src/southbridge/amd/pi/hudson/hudson.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/amd/pi/hudson/hudson.h b/src/southbridge/amd/pi/hudson/hudson.h index 9cc007090d..ecb9fb0350 100644 --- a/src/southbridge/amd/pi/hudson/hudson.h +++ b/src/southbridge/amd/pi/hudson/hudson.h @@ -48,7 +48,7 @@ #define PM_HUD_SD_FLASH_CTRL 0xE7 #define PM_YANG_SD_FLASH_CTRL 0xE8 -#define HUDSON_ACPI_IO_BASE 0x800 +#define HUDSON_ACPI_IO_BASE 0x600 #define ACPI_PM_EVT_BLK (HUDSON_ACPI_IO_BASE + 0x00) /* 4 bytes */ #define ACPI_PM1_CNT_BLK (HUDSON_ACPI_IO_BASE + 0x04) /* 2 bytes */ #define ACPI_PM_TMR_BLK (HUDSON_ACPI_IO_BASE + 0x18) /* 4 bytes */ |