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authorMarshall Dawson <marshalldawson3rd@gmail.com>2017-07-10 18:39:09 -0600
committerMartin Roth <martinroth@google.com>2017-08-04 15:24:43 +0000
commit570583ea8e796dd2ae25d9c021455367cc8318bc (patch)
tree076c3c65b32d564757204894d8cedf7788ad437a /src/southbridge/amd/pi
parentbbedef9cfaa23356c79b1318da799450f39ca8e7 (diff)
downloadcoreboot-570583ea8e796dd2ae25d9c021455367cc8318bc.tar.xz
southbridge/pi/hudson: Fix GPIO bank1 control definition
Change-Id: I3ef3ea3ea22faa0152d99923da2e57517ab3d0be Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/20527 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/southbridge/amd/pi')
-rw-r--r--src/southbridge/amd/pi/hudson/gpio.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/amd/pi/hudson/gpio.h b/src/southbridge/amd/pi/hudson/gpio.h
index 3863ed2080..dad2279e6c 100644
--- a/src/southbridge/amd/pi/hudson/gpio.h
+++ b/src/southbridge/amd/pi/hudson/gpio.h
@@ -59,7 +59,7 @@
#define GPIO_42 (GPIO_BANK0_CONTROL + 0xA8)
/* GPIO_64 - GPIO_127 */
-#define GPIO_BANK1 (CONTROL AMD_SB_ACPI_MMIO_ADDR + 0x1600)
+#define GPIO_BANK1_CONTROL (AMD_SB_ACPI_MMIO_ADDR + 0x1600)
#define GPIO_64 (GPIO_BANK1_CONTROL + 0x00)
#define GPIO_65 (GPIO_BANK1_CONTROL + 0x04)
#define GPIO_66 (GPIO_BANK1_CONTROL + 0x08)