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| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2017-01-07 18:17:32 -0500 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-03-28 22:29:18 +0200 |
| commit | c6be0d854a99120e0faa224af23e25679790c419 (patch) | |
| tree | c17c56909e1f2855ee521484cf86bb00bd87548e /src/southbridge/amd/pi | |
| parent | f4b9b41c475b5c2c212e619d5c6f391204578b41 (diff) | |
| download | coreboot-c6be0d854a99120e0faa224af23e25679790c419.tar.xz | |
amd/pi/hudson: Add alternate method for including amdfw
For systems using Chrome OS, place the amdfw outside of cbfs control.
The firmware must go to a fixed position at an offset of 0x20000 into
the flash device.
Potentially improve by adding a warning or error message for the
condition when sizeof(amdfw) + sizeof(cbfs and metadata) > sizeof(flash).
Original-Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Original-Reviewed-by: Marc Jones <marcj303@gmail.com>
(cherry picked from commit 2d9d631b39d7850576438a5b0979936bd33893e1)
Change-Id: I38029bc03e5db260424cca293b1a7bceea4d0d75
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/18435
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/southbridge/amd/pi')
| -rw-r--r-- | src/southbridge/amd/pi/hudson/Kconfig | 8 | ||||
| -rw-r--r-- | src/southbridge/amd/pi/hudson/Makefile.inc | 13 |
2 files changed, 21 insertions, 0 deletions
diff --git a/src/southbridge/amd/pi/hudson/Kconfig b/src/southbridge/amd/pi/hudson/Kconfig index f6e3355ddb..7b3b7850a8 100644 --- a/src/southbridge/amd/pi/hudson/Kconfig +++ b/src/southbridge/amd/pi/hudson/Kconfig @@ -204,6 +204,14 @@ config AZ_PIN bit 3,2 - pin 1 bit 5,4 - pin 2 bit 7,6 - pin 3 + +config AMDFW_OUTSIDE_CBFS + def_bool n + help + The AMDFW (PSP) is typically locatable in cbfs. Select this + option to manually attach the generated amdfw.rom at an + offset of 0x20000 from the bottom of the coreboot ROM image. + endif config HUDSON_UART diff --git a/src/southbridge/amd/pi/hudson/Makefile.inc b/src/southbridge/amd/pi/hudson/Makefile.inc index 24a757ca3b..2153c62825 100644 --- a/src/southbridge/amd/pi/hudson/Makefile.inc +++ b/src/southbridge/amd/pi/hudson/Makefile.inc @@ -264,7 +264,20 @@ $(obj)/amdfw.rom: $(call strip_quotes, $(CONFIG_HUDSON_XHCI_FWM_FILE)) \ --flashsize $(CONFIG_ROM_SIZE) \ --output $@ +ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y) +PHONY+=add_amdfw +INTERMEDIATE+=add_amdfw + +add_amdfw: $(obj)/coreboot.pre $(obj)/amdfw.rom + printf " DD Adding AMD Firmware\n" + dd if=$(obj)/amdfw.rom \ + of=$(obj)/coreboot.pre conv=notrunc bs=1 seek=131072 >/dev/null 2>&1 + +else # ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y) + cbfs-files-y += apu/amdfw apu/amdfw-file := $(obj)/amdfw.rom apu/amdfw-position := $(HUDSON_FWM_POSITION) apu/amdfw-type := raw + +endif # ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y) |