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author | Uwe Hermann <uwe@hermann-uwe.de> | 2010-09-24 23:37:25 +0000 |
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committer | Uwe Hermann <uwe@hermann-uwe.de> | 2010-09-24 23:37:25 +0000 |
commit | ff492b18550d6e24cdaffbb265f2fecc294486a3 (patch) | |
tree | d5f123d248c2218936bf7cc87ff0f6b31cb70455 /src/southbridge/amd/rs690/chip.h | |
parent | 977b985095098fc64b223faea32141680a13c7e3 (diff) | |
download | coreboot-ff492b18550d6e24cdaffbb265f2fecc294486a3.tar.xz |
Make SB600/SB700 more similar for easier diffs (trivial).
Also fixes random whitespace issues, typos, etc.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5837 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/amd/rs690/chip.h')
-rw-r--r-- | src/southbridge/amd/rs690/chip.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/amd/rs690/chip.h b/src/southbridge/amd/rs690/chip.h index 6ae3dd5a0f..5e08cc59f8 100644 --- a/src/southbridge/amd/rs690/chip.h +++ b/src/southbridge/amd/rs690/chip.h @@ -20,13 +20,13 @@ #ifndef RS690_CHIP_H #define RS690_CHIP_H -/* Member variables are defined in Config.lb. */ +/* Member variables are defined in devicetree.cb. */ struct southbridge_amd_rs690_config { u8 gpp_configuration; /* The configuration of General Purpose Port, A/B/C/D/E. */ u8 port_enable; /* Which port is enabled? GFX(2,3), GPP(4,5,6,7) */ u8 gfx_dev2_dev3; /* for GFX Core initialization REFCLK_SEL */ - u8 gfx_dual_slot; /* Is it dual graphics slots */ + u8 gfx_dual_slot; /* Is it dual graphics slots */ u8 gfx_lane_reversal; /* Single/Dual slot lan reversal */ u8 gfx_tmds; /* whether support TMDS? */ u8 gfx_compliance; /* whether support compliance? */ |