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| author | Stefan Reinauer <stepan@coresystems.de> | 2010-04-09 11:34:59 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-04-09 11:34:59 +0000 |
| commit | 6a445e812604edaa0f11c99d835eddaeefa83d3b (patch) | |
| tree | f8c0a89af9c72b4d8a040eced78c86d7b899abfc /src/southbridge/amd/rs690 | |
| parent | 7488e049df9899dd7062b2ffe393b3e9a6f50dc5 (diff) | |
| download | coreboot-6a445e812604edaa0f11c99d835eddaeefa83d3b.tar.xz | |
zero warning days.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5389 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/amd/rs690')
| -rw-r--r-- | src/southbridge/amd/rs690/rs690_gfx.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/amd/rs690/rs690_gfx.c b/src/southbridge/amd/rs690/rs690_gfx.c index 7f76a057ac..887c38e8de 100644 --- a/src/southbridge/amd/rs690/rs690_gfx.c +++ b/src/southbridge/amd/rs690/rs690_gfx.c @@ -34,6 +34,7 @@ #define CLK_CNTL_INDEX 0x8 #define CLK_CNTL_DATA 0xC +#if 0 static u32 clkind_read(device_t dev, u32 index) { u32 gfx_bar2 = pci_read_config32(dev, 0x18) & ~0xF; @@ -41,6 +42,7 @@ static u32 clkind_read(device_t dev, u32 index) *(u32*)(gfx_bar2+CLK_CNTL_INDEX) = index & 0x7F; return *(u32*)(gfx_bar2+CLK_CNTL_DATA); } +#endif static void clkind_write(device_t dev, u32 index, u32 data) { @@ -73,8 +75,6 @@ static void rs690_gfx_read_resources(device_t dev) static void internal_gfx_pci_dev_init(struct device *dev) { u16 deviceid, vendorid; - struct southbridge_amd_rs690_config *cfg = - (struct southbridge_amd_rs690_config *)dev->chip_info; deviceid = pci_read_config16(dev, PCI_DEVICE_ID); vendorid = pci_read_config16(dev, PCI_VENDOR_ID); printk(BIOS_INFO, "internal_gfx_pci_dev_init device=%x, vendor=%x.\n", |