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| author | Liu Tao <liutao1980@gmail.com> | 2010-10-17 21:34:45 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2010-10-17 21:34:45 +0000 |
| commit | dfecd2740b9ecc6950bf08b8b40573158541d56a (patch) | |
| tree | ed2f1a6b61078f117b2b0a9d45f75eaa2a96aeb6 /src/southbridge/amd/rs690 | |
| parent | c6a106286bb30bd0532ffdd2443e8add52072967 (diff) | |
| download | coreboot-dfecd2740b9ecc6950bf08b8b40573158541d56a.tar.xz | |
We currently read the CPU HT speed from HT chain 0's register.
Fix that to read the register from the chain where the SB chip is on.
Signed-off-by: Liu Tao <liutao1980@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5958 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/amd/rs690')
0 files changed, 0 insertions, 0 deletions