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author | Kerry She <kerry.she@amd.com> | 2011-05-07 08:51:32 +0000 |
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committer | Kerry She <Kerry.She@amd.com> | 2011-05-07 08:51:32 +0000 |
commit | faafd14fe0d18de1f71491f4503f36a4f9d9a188 (patch) | |
tree | 0d1f897787502139893cbcc9d8f5163e7f6767f1 /src/southbridge/amd/rs780/chip.h | |
parent | eb995c209c81bcc0851335dd9bc3b1f38965271d (diff) | |
download | coreboot-faafd14fe0d18de1f71491f4503f36a4f9d9a188.tar.xz |
RS780 DDI Lanes configure support,
and remove RS780 get_cpu_rev().
Signed-off-by: Kerry She <kerry.she@amd.com>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6560 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/amd/rs780/chip.h')
-rw-r--r-- | src/southbridge/amd/rs780/chip.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/southbridge/amd/rs780/chip.h b/src/southbridge/amd/rs780/chip.h index 87053f24a9..4a10ae0f8a 100644 --- a/src/southbridge/amd/rs780/chip.h +++ b/src/southbridge/amd/rs780/chip.h @@ -33,6 +33,8 @@ struct southbridge_amd_rs780_config u8 gfx_compliance; /* whether support compliance? */ u8 gfx_reconfiguration; /* Dynamic Lind Width Control */ u8 gfx_link_width; /* Desired width of lane 2 */ + u8 gfx_pcie_config; /* GFX PCIE Modes */ + u8 gfx_ddi_config; /* GFX DDI Modes */ }; struct chip_operations; extern struct chip_operations southbridge_amd_rs780_ops; |