diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2018-05-22 02:18:00 +0300 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2019-01-06 01:17:54 +0000 |
| commit | c70eed1e6202c928803f3e7f79161cd247a62b23 (patch) | |
| tree | e46a6c87f6f13b7719fd40a9360d8d03359bfffb /src/southbridge/amd/rs780/cmn.c | |
| parent | 54efaae701dacd58621e66a8cf56812eb5304946 (diff) | |
| download | coreboot-c70eed1e6202c928803f3e7f79161cd247a62b23.tar.xz | |
device: Use pcidev_on_root()
Change-Id: Icf34b39d80f6e46d32a39b68f38fb2752c0bcebc
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/26484
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Piotr Król <piotr.krol@3mdeb.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/southbridge/amd/rs780/cmn.c')
| -rw-r--r-- | src/southbridge/amd/rs780/cmn.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/amd/rs780/cmn.c b/src/southbridge/amd/rs780/cmn.c index 16270d6d89..2ef9cd6bf2 100644 --- a/src/southbridge/amd/rs780/cmn.c +++ b/src/southbridge/amd/rs780/cmn.c @@ -192,8 +192,8 @@ void set_pcie_enable_bits(struct device *dev, u32 reg_pos, u32 mask, u32 val) void ProgK8TempMmioBase(u8 in_out, u32 pcie_base_add, u32 mmio_base_add) { /* K8 Function1 is address map */ - struct device *k8_f1 = dev_find_slot(0, PCI_DEVFN(0x18, 1)); - struct device *k8_f0 = dev_find_slot(0, PCI_DEVFN(0x18, 0)); + struct device *k8_f1 = pcidev_on_root(0x18, 1); + struct device *k8_f0 = pcidev_on_root(0x18, 0); if (in_out) { u32 dword, sblk; |