summaryrefslogtreecommitdiff
path: root/src/southbridge/amd/rs780/gfx.c
diff options
context:
space:
mode:
authorDenis 'GNUtoo' Carikli <GNUtoo@no-log.org>2011-11-27 13:43:16 +0100
committerPatrick Georgi <patrick@georgi-clan.de>2011-12-05 08:58:43 +0100
commit7519d77f72836d47349c563b398e59d3ea8d8b97 (patch)
tree3a8b2e90b745afe6f7d61f076fb450ce93e355de /src/southbridge/amd/rs780/gfx.c
parent6cdf5a9e2e545e18f8878698ec9cae61b6ad964b (diff)
downloadcoreboot-7519d77f72836d47349c563b398e59d3ea8d8b97.tar.xz
RS780: print the vgainfo
With this commit the vgainfo is printed and looks like that on the serial console: vgainfo: ulBootUpEngineClock:50000 ulBootUpUMAClock:66700 ulBootUpSidePortClock:0 ulMinSidePortClock:0 ulSystemConfig:0 ulBootUpReqDisplayVector:0 ulOtherDisplayMisc:0 ulDDISlot1Config:0 ulDDISlot2Config:0 ucMemoryType:0 ucUMAChannelNumber:1 ucDockingPinBit:0 ucDockingPinPolarity:0 ulDockingPinCFGInfo:0 ulCPUCapInfo: 2 usNumberOfCyclesInPeriod:0 usMaxNBVoltage:0 usMinNBVoltage:0 usBootUpNBVoltage:0 ulHTLinkFreq:20000 usMinHTLinkWidth:8 usMaxHTLinkWidth:8 usUMASyncStartDelay:100 usUMADataReturnTime:300 usLinkStatusZeroTime:600 ulHighVoltageHTLinkFreq:20000 ulLowVoltageHTLinkFreq:20000 usMaxUpStreamHTLinkWidth:8 usMaxDownStreamHTLinkWidth:8 usMinUpStreamHTLinkWidth:8 usMinDownStreamHTLinkWidth:8 Change-Id: I17c2a13ab52a0f78588f812d4f42f45f9a7b7524 Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org> Reviewed-on: http://review.coreboot.org/456 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/southbridge/amd/rs780/gfx.c')
-rw-r--r--src/southbridge/amd/rs780/gfx.c80
1 files changed, 80 insertions, 0 deletions
diff --git a/src/southbridge/amd/rs780/gfx.c b/src/southbridge/amd/rs780/gfx.c
index 65a5e2bd2f..29a63943bc 100644
--- a/src/southbridge/amd/rs780/gfx.c
+++ b/src/southbridge/amd/rs780/gfx.c
@@ -575,6 +575,86 @@ static void internal_gfx_pci_dev_init(struct device *dev)
/* Poweron DDI Lanes */
poweron_ddi_lanes(nb_dev);
+ printk(BIOS_DEBUG,"vgainfo:\n"
+ " ulBootUpEngineClock:%lu \n"
+ " ulBootUpUMAClock:%lu \n"
+ " ulBootUpSidePortClock:%lu \n"
+ " ulMinSidePortClock:%lu \n"
+ " ulSystemConfig:%lu \n"
+ " ulBootUpReqDisplayVector:%lu \n"
+ " ulOtherDisplayMisc:%lu \n"
+ " ulDDISlot1Config:%lu \n"
+ " ulDDISlot2Config:%lu \n"
+
+ " ucMemoryType:%u \n"
+ " ucUMAChannelNumber:%u \n"
+ " ucDockingPinBit:%u \n"
+ " ucDockingPinPolarity:%u \n"
+
+ " ulDockingPinCFGInfo:%lu \n"
+ " ulCPUCapInfo: %lu \n"
+
+ " usNumberOfCyclesInPeriod:%hu \n"
+ " usMaxNBVoltage:%hu \n"
+ " usMinNBVoltage:%hu \n"
+ " usBootUpNBVoltage:%hu \n"
+
+ " ulHTLinkFreq:%lu \n"
+
+ " usMinHTLinkWidth:%hu \n"
+ " usMaxHTLinkWidth:%hu \n"
+ " usUMASyncStartDelay:%hu \n"
+ " usUMADataReturnTime:%hu \n"
+ " usLinkStatusZeroTime:%hu \n"
+
+ " ulHighVoltageHTLinkFreq:%lu \n"
+ " ulLowVoltageHTLinkFreq:%lu \n"
+
+ " usMaxUpStreamHTLinkWidth:%hu \n"
+ " usMaxDownStreamHTLinkWidth:%hu \n"
+ " usMinUpStreamHTLinkWidth:%hu \n"
+ " usMinDownStreamHTLinkWidth:%hu \n",
+
+ (unsigned long)vgainfo.ulBootUpEngineClock,
+ (unsigned long)vgainfo.ulBootUpUMAClock,
+ (unsigned long)vgainfo.ulBootUpSidePortClock,
+ (unsigned long)vgainfo.ulMinSidePortClock,
+ (unsigned long)vgainfo.ulSystemConfig,
+ (unsigned long)vgainfo.ulBootUpReqDisplayVector,
+ (unsigned long)vgainfo.ulOtherDisplayMisc,
+ (unsigned long)vgainfo.ulDDISlot1Config,
+ (unsigned long)vgainfo.ulDDISlot2Config,
+
+ vgainfo.ucMemoryType,
+ vgainfo.ucUMAChannelNumber,
+ vgainfo.ucDockingPinBit,
+ vgainfo.ucDockingPinPolarity,
+
+ (unsigned long)vgainfo.ulDockingPinCFGInfo,
+ (unsigned long)vgainfo.ulCPUCapInfo,
+
+ vgainfo.usNumberOfCyclesInPeriod,
+ vgainfo.usMaxNBVoltage,
+ vgainfo.usMinNBVoltage,
+ vgainfo.usBootUpNBVoltage,
+
+ (unsigned long)vgainfo.ulHTLinkFreq,
+
+ vgainfo.usMinHTLinkWidth,
+ vgainfo.usMaxHTLinkWidth,
+ vgainfo.usUMASyncStartDelay,
+ vgainfo.usUMADataReturnTime,
+ vgainfo.usLinkStatusZeroTime,
+
+ (unsigned long)vgainfo.ulHighVoltageHTLinkFreq,
+ (unsigned long)vgainfo.ulLowVoltageHTLinkFreq,
+
+ vgainfo.usMaxUpStreamHTLinkWidth,
+ vgainfo.usMaxDownStreamHTLinkWidth,
+ vgainfo.usMinUpStreamHTLinkWidth,
+ vgainfo.usMinDownStreamHTLinkWidth);
+
+
/* Transfer the Table to VBIOS. */
pointer = (u32 *)&vgainfo;
for(i=0; i<sizeof(ATOM_INTEGRATED_SYSTEM_INFO_V2); i+=4)