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| author | Scott Duplichan <scott@notabs.org> | 2010-11-24 00:39:44 +0000 |
|---|---|---|
| committer | Scott Duplichan <scott@notabs.org> | 2010-11-24 00:39:44 +0000 |
| commit | 88dc53178177c3cfc28bfebab2422dc4133bd7dc (patch) | |
| tree | 9043197ae117f504212f0377ef17cce5da771115 /src/southbridge/amd/rs780/rs780.h | |
| parent | 0cda9597109f2e4cd922ee4ec66367b6513360db (diff) | |
| download | coreboot-88dc53178177c3cfc28bfebab2422dc4133bd7dc.tar.xz | |
This patch solves crashes and BSODs that occur when booting Win7 with
AMD RS780 uma graphics. Tested with frame buffer sizes 64m through 1GB
by running dxdiag and Windows media player at 1600x1200 true color.
Additional changes needed to boot Win7 on Mahogany_fam10 will follow.
-- Enable and program the debug bar as required by the ATI graphics driver.
First, make the debug bar writable and allow resource allocation code
to program it. Once programmed, enable its operation.
-- Disable the family 10h processor mmconf while the RS780 mmconf is in use.
-- Make strap programming more closely follow the reference BIOS.
-- Disable PCIe bar 3 after using it.
-- UMA size is no longer hardcoded.
-- Disable write combining for all steppings to eliminate stability problem.
-- Correct task file data.
-- Improve the accuracy of the Atom table that passes information to the driver.
Signed-off-by: Scott Duplichan <scott@notabs.org>
Acked-by: Rudolf Marek <r.marek@assembler.cz>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6120 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/amd/rs780/rs780.h')
| -rw-r--r-- | src/southbridge/amd/rs780/rs780.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/southbridge/amd/rs780/rs780.h b/src/southbridge/amd/rs780/rs780.h index 7939303fe1..c91a4b3022 100644 --- a/src/southbridge/amd/rs780/rs780.h +++ b/src/southbridge/amd/rs780/rs780.h @@ -208,4 +208,9 @@ void avoid_lpc_dma_deadlock(device_t nb_dev, device_t sb_dev); void config_gpp_core(device_t nb_dev, device_t sb_dev); void PcieReleasePortTraining(device_t nb_dev, device_t dev, u32 port); u8 PcieTrainPort(device_t nb_dev, device_t dev, u32 port); +u32 extractbit(u32 data, int bit_number); +u32 extractbits(u32 source, int lsb, int msb); +int cpuidFamily(void); +int is_family0Fh(void); +int is_family10h(void); #endif /* RS780_H */ |