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authorZheng Bao <zheng.bao@amd.com>2010-12-09 06:18:29 +0000
committerZheng Bao <Zheng.Bao@amd.com>2010-12-09 06:18:29 +0000
commit4a778db86edfb65fe74ba2a2596efe3347780b8c (patch)
tree70867b0d821e27be1c77a8ca5860fe5fdf3f814f /src/southbridge/amd/rs780
parentabebf5ca92c0b9a8adef4c83ab1feed3040c6644 (diff)
downloadcoreboot-4a778db86edfb65fe74ba2a2596efe3347780b8c.tar.xz
Add missing instruction break.
Signed-off-by: Zheng Bao <zheng.bao@amd.com> Acked-by: Zheng Bao <zheng.bao@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6155 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/amd/rs780')
-rw-r--r--src/southbridge/amd/rs780/gfx.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/amd/rs780/gfx.c b/src/southbridge/amd/rs780/gfx.c
index 1763c36047..4a141314f9 100644
--- a/src/southbridge/amd/rs780/gfx.c
+++ b/src/southbridge/amd/rs780/gfx.c
@@ -1298,7 +1298,6 @@ void rs780_gfx_init(device_t nb_dev, device_t dev, u32 port)
break;
case 2:
-
if(is_dev3_present()){
/* step 1, lane reversal (only need if CMOS option is enabled) */
if (cfg->gfx_lane_reversal) {
@@ -1332,6 +1331,7 @@ void rs780_gfx_init(device_t nb_dev, device_t dev, u32 port)
printk(BIOS_DEBUG, "If dev3.., single port. Do nothing.\n");
}
}
+ break;
default:
printk(BIOS_INFO, "Incorrect configuration of external GFX slot.\n");