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authorStefan Reinauer <reinauer@chromium.org>2012-11-16 13:34:48 -0800
committerPatrick Georgi <patrick@georgi-clan.de>2012-11-20 21:56:05 +0100
commit8ada1526df06cb50a82305e840a5181a3c65575f (patch)
treef1033ee31bdff4add530dedc74b7c537cd175714 /src/southbridge/amd/rs780
parent82ecf4c582fdab341d88bd80ae3e9a629619c263 (diff)
downloadcoreboot-8ada1526df06cb50a82305e840a5181a3c65575f.tar.xz
Unify use of bool config variables
e.g. -#if CONFIG_LOGICAL_CPUS == 1 +#if CONFIG_LOGICAL_CPUS This will make it easier to switch over to use the config_enabled() macro later on. Change-Id: I0bcf223669318a7b1105534087c7675a74c1dd8a Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/1874 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/southbridge/amd/rs780')
-rw-r--r--src/southbridge/amd/rs780/early_setup.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/src/southbridge/amd/rs780/early_setup.c b/src/southbridge/amd/rs780/early_setup.c
index 0540823f16..31b31736cd 100644
--- a/src/southbridge/amd/rs780/early_setup.c
+++ b/src/southbridge/amd/rs780/early_setup.c
@@ -147,7 +147,7 @@ static u8 is_famly10(void)
return (cpuid_eax(1) & 0xff00000) != 0;
}
-#if CONFIG_NORTHBRIDGE_AMD_AMDFAM10 == 1 /* save some spaces */
+#if CONFIG_NORTHBRIDGE_AMD_AMDFAM10
static u8 l3_cache(void)
{
return (cpuid_edx(0x80000006) & (0x3FFF << 18)) != 0;
@@ -246,7 +246,7 @@ static void rs780_htinit(void)
} else if ((cpu_ht_freq > 0x6) && (cpu_ht_freq < 0xf)) {
printk(BIOS_INFO, "rs780_htinit: HT3 mode\n");
- #if CONFIG_NORTHBRIDGE_AMD_AMDFAM10 == 1 /* save some spaces */
+ #if CONFIG_NORTHBRIDGE_AMD_AMDFAM10
/* HT3 mode, RPR 8.4.3 */
set_nbcfg_enable_bits(rs780_f0, 0x9c, 0x3 << 16, 0);
@@ -282,11 +282,11 @@ static void rs780_htinit(void)
/* Sets Training 0 Time. See T0Time table for encodings */
set_fam10_ext_cfg_enable_bits(cpu_f0, 0x16C, 0x3F, 0x20);
/* TODO: */
- #endif /* #if CONFIG_NORTHBRIDGE_AMD_AMDFAM10 == 1 */
+ #endif /* CONFIG_NORTHBRIDGE_AMD_AMDFAM10 */
}
}
-#if CONFIG_NORTHBRIDGE_AMD_AMDFAM10 != 1 /* save some spaces */
+#if !CONFIG_NORTHBRIDGE_AMD_AMDFAM10
/*******************************************************
* Optimize k8 with UMA.
* See BKDG_NPT_0F guide for details.
@@ -340,9 +340,9 @@ static void k8_optimization(void)
}
#else
#define k8_optimization() do{}while(0)
-#endif /* #if CONFIG_NORTHBRIDGE_AMD_AMDFAM10 != 1 */
+#endif /* !CONFIG_NORTHBRIDGE_AMD_AMDFAM10 */
-#if CONFIG_NORTHBRIDGE_AMD_AMDFAM10 == 1 /* save some spaces */
+#if CONFIG_NORTHBRIDGE_AMD_AMDFAM10
static void fam10_optimization(void)
{
device_t cpu_f0, cpu_f2, cpu_f3;
@@ -405,7 +405,7 @@ static void fam10_optimization(void)
}
#else
#define fam10_optimization() do{}while(0)
-#endif /* #if CONFIG_NORTHBRIDGE_AMD_AMDFAM10 == 1 */
+#endif /* CONFIG_NORTHBRIDGE_AMD_AMDFAM10 */
/*****************************************
* rs780_por_pcicfg_init()