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authorPatrick Georgi <patrick@georgi-clan.de>2012-05-05 15:29:32 +0200
committerStefan Reinauer <stefan.reinauer@coreboot.org>2012-05-08 00:34:34 +0200
commite166782f397f7db2c4446c5e120fa30afbde7bdd (patch)
treefac736e744d9ec6d49e321e63971277e611d2000 /src/southbridge/amd/rs780
parentfe4221848f86ab97d2c439299826d97e48542404 (diff)
downloadcoreboot-e166782f397f7db2c4446c5e120fa30afbde7bdd.tar.xz
Clean up #ifs
Replace #if CONFIG_FOO==1 with #if CONFIG_FOO: find src -name \*.[ch] -exec sed -i "s,#if[[:space:]]*\(CONFIG_[A-Z0-9_]*\)[[:space:]]*==[[:space:]]*1[[:space:]]*\$,#if \1," {} + Replace #if (CONFIG_FOO==1) with #if CONFIG_FOO: find src -name \*.[ch] -exec sed -i "s,#if[[:space:]]*(\(CONFIG_[A-Z0-9_]*\)[[:space:]]*==[[:space:]]*1)[[:space:]]*\$,#if \1," {} + Replace #if CONFIG_FOO==0 with #if !CONFIG_FOO: find src -name \*.[ch] -exec sed -i "s,#if[[:space:]]*\(CONFIG_[A-Z0-9_]*\)[[:space:]]*==[[:space:]]*0[[:space:]]*\$,#if \!\1," {} + Replace #if (CONFIG_FOO==0) with #if !CONFIG_FOO: find src -name \*.[ch] -exec sed -i "s,#if[[:space:]]*(\(CONFIG_[A-Z0-9_]*\)[[:space:]]*==[[:space:]]*0)[[:space:]]*\$,#if \!\1," {} + (and some manual changes to fix false positives) Change-Id: Iac6ca7605a5f99885258cf1a9a2473a92de27c42 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/1004 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-by: Martin Roth <martin@se-eng.com>
Diffstat (limited to 'src/southbridge/amd/rs780')
-rw-r--r--src/southbridge/amd/rs780/early_setup.c2
-rw-r--r--src/southbridge/amd/rs780/gfx.c6
-rw-r--r--src/southbridge/amd/rs780/rs780.c2
3 files changed, 5 insertions, 5 deletions
diff --git a/src/southbridge/amd/rs780/early_setup.c b/src/southbridge/amd/rs780/early_setup.c
index 8adf1f6a75..0540823f16 100644
--- a/src/southbridge/amd/rs780/early_setup.c
+++ b/src/southbridge/amd/rs780/early_setup.c
@@ -101,7 +101,7 @@ static void set_nbcfg_enable_bits(device_t nb_dev, u32 reg_pos, u32 mask,
}
}
/* family 10 only, for reg > 0xFF */
-#if CONFIG_NORTHBRIDGE_AMD_AMDFAM10 == 1
+#if CONFIG_NORTHBRIDGE_AMD_AMDFAM10
static void set_fam10_ext_cfg_enable_bits(device_t fam10_dev, u32 reg_pos, u32 mask,
u32 val)
{
diff --git a/src/southbridge/amd/rs780/gfx.c b/src/southbridge/amd/rs780/gfx.c
index 29a63943bc..e8d4596adf 100644
--- a/src/southbridge/amd/rs780/gfx.c
+++ b/src/southbridge/amd/rs780/gfx.c
@@ -659,7 +659,7 @@ static void internal_gfx_pci_dev_init(struct device *dev)
pointer = (u32 *)&vgainfo;
for(i=0; i<sizeof(ATOM_INTEGRATED_SYSTEM_INFO_V2); i+=4)
{
-#if (CONFIG_GFXUMA == 1)
+#if CONFIG_GFXUMA
*GpuF0MMReg = 0x80000000 + uma_memory_size - 512 + i;
#else
*GpuF0MMReg = 0x80000000 + 0x8000000 - 512 + i;
@@ -775,7 +775,7 @@ static void rs780_internal_gfx_enable(device_t dev)
device_t nb_dev = dev_find_slot(0, 0);
msr_t sysmem;
-#if (CONFIG_GFXUMA == 0)
+#if !CONFIG_GFXUMA
u32 FB_Start, FB_End;
#endif
@@ -818,7 +818,7 @@ static void rs780_internal_gfx_enable(device_t dev)
set_nbmc_enable_bits(nb_dev, 0x25, 0xffffffff, 0x111f111f);
set_htiu_enable_bits(nb_dev, 0x37, 1<<24, 1<<24);
-#if (CONFIG_GFXUMA == 1)
+#if CONFIG_GFXUMA
/* GFX_InitUMA. */
/* Copy CPU DDR Controller to NB MC. */
device_t k8_f1 = dev_find_slot(0, PCI_DEVFN(0x18, 1));
diff --git a/src/southbridge/amd/rs780/rs780.c b/src/southbridge/amd/rs780/rs780.c
index 717aeab2c6..9b153aae1b 100644
--- a/src/southbridge/amd/rs780/rs780.c
+++ b/src/southbridge/amd/rs780/rs780.c
@@ -220,7 +220,7 @@ static void rs780_nb_gfx_dev_table(device_t nb_dev, device_t dev)
/* Program Straps. */
romstrap2 = 1 << 26; // enables audio function
-#if (CONFIG_GFXUMA == 1)
+#if CONFIG_GFXUMA
extern uint64_t uma_memory_size;
// bits 7-9: aperture size
// 0-7: 128mb, 256mb, 64mb, 32mb, 512mb, 1g, 2g, 4g