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authorElyes HAOUAS <ehaouas@noos.fr>2018-07-08 12:41:56 +0200
committerPatrick Georgi <pgeorgi@google.com>2018-07-09 09:31:54 +0000
commit251279c537397835a4504165e7582cb29c19891c (patch)
treea4d208e75433392f19b18b912ecf642b7a545ba4 /src/southbridge/amd/rs780
parent39303d5d4960814fc606cce3a9ec10545faaef4b (diff)
downloadcoreboot-251279c537397835a4504165e7582cb29c19891c.tar.xz
src/southbridge: Use "foo *bar" instead of "foo* bar"
Change-Id: I72d50615d77b91529810e8f590fa56f3c6f7546c Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/27409 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/southbridge/amd/rs780')
-rw-r--r--src/southbridge/amd/rs780/gfx.c6
-rw-r--r--src/southbridge/amd/rs780/rs780.c2
2 files changed, 4 insertions, 4 deletions
diff --git a/src/southbridge/amd/rs780/gfx.c b/src/southbridge/amd/rs780/gfx.c
index 30345bef11..43bfb02037 100644
--- a/src/southbridge/amd/rs780/gfx.c
+++ b/src/southbridge/amd/rs780/gfx.c
@@ -311,9 +311,9 @@ static void poweron_ddi_lanes(struct device *nb_dev)
static void internal_gfx_pci_dev_init(struct device *dev)
{
- unsigned char * bpointer;
- volatile u32 * GpuF0MMReg;
- volatile u32 * pointer;
+ unsigned char *bpointer;
+ volatile u32 *GpuF0MMReg;
+ volatile u32 *pointer;
int i;
u16 command;
u32 value;
diff --git a/src/southbridge/amd/rs780/rs780.c b/src/southbridge/amd/rs780/rs780.c
index f4f33efab7..3c9393d3e3 100644
--- a/src/southbridge/amd/rs780/rs780.c
+++ b/src/southbridge/amd/rs780/rs780.c
@@ -187,7 +187,7 @@ static void rs780_nb_gfx_dev_table(struct device *nb_dev, struct device *dev)
{
/* NB_InitGFXStraps */
u32 MMIOBase, apc04, apc18, apc24, romstrap2;
- volatile u32 * strap;
+ volatile u32 *strap;
/* Choose a base address that is unused and routed to the RS780. */
MMIOBase = 0xFFB00000;