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| author | Michael Xie <Michael.Xie@amd.com> | 2008-09-22 13:11:39 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2008-09-22 13:11:39 +0000 |
| commit | 7586cef37aace94f1558a391b25245f08523ab95 (patch) | |
| tree | 92dd060f73e441bd702b26bb04231d4be9d0ecc1 /src/southbridge/amd/sb600/sb600.h | |
| parent | 06755e404eb4b97dab5bc5ff90443f7d7d74d3cf (diff) | |
| download | coreboot-7586cef37aace94f1558a391b25245f08523ab95.tar.xz | |
Patch for AMD SB600 chipset.
Most of the functions in SB600 are enabled except power management.
Signed-off-by: Michael Xie <Michael.Xie@amd.com>
Reviewed-by: Marc Jones <marc.jones@amd.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3589 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/amd/sb600/sb600.h')
| -rw-r--r-- | src/southbridge/amd/sb600/sb600.h | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/src/southbridge/amd/sb600/sb600.h b/src/southbridge/amd/sb600/sb600.h new file mode 100644 index 0000000000..27d42364a8 --- /dev/null +++ b/src/southbridge/amd/sb600/sb600.h @@ -0,0 +1,47 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2008 Advanced Micro Devices, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef SB600_H +#define SB600_H + +#include "chip.h" + +#define PCI_DEVICE_ID_ATI_SB600_LPC 0x438D +#define PCI_DEVICE_ID_ATI_SB600_SATA 0x4380 +#define PCI_DEVICE_ID_ATI_SB600_IDE 0x438C +#define PCI_DEVICE_ID_ATI_SB600_HDA 0x4383 +#define PCI_DEVICE_ID_ATI_SB600_ACI 0x4382 +#define PCI_DEVICE_ID_ATI_SB600_MCI 0x438E +#define PCI_DEVICE_ID_ATI_SB600_USB2 0x4386 +#define PCI_DEVICE_ID_ATI_SB600_PCI 0x4384 +#define PCI_DEVICE_ID_ATI_SB600_SM 0x4385 +#define PCI_DEVICE_ID_ATI_SB600_USB_0 0x4387 +#define PCI_DEVICE_ID_ATI_SB600_USB_1 0x4388 +#define PCI_DEVICE_ID_ATI_SB600_USB_2 0x4389 +#define PCI_DEVICE_ID_ATI_SB600_USB_3 0x438A +#define PCI_DEVICE_ID_ATI_SB600_USB_4 0x438B +extern void pm_iowrite(u8 reg, u8 value); +extern u8 pm_ioread(u8 reg); +extern void pm2_iowrite(u8 reg, u8 value); +extern u8 pm2_ioread(u8 reg); +extern void set_sm_enable_bits(device_t sm_dev, u32 reg_pos, u32 mask, u32 val); + +void sb600_enable(device_t dev); + +#endif /* SB600_H */ |