printk_foo -> printk(BIOS_FOO, ...)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5266 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

8 files changed, 47 insertions, 48 deletions

diff --git a/src/southbridge/amd/sb600/sb600.c b/src/southbridge/amd/sb600/sb600.c
index 1e34786b77..d9b3dcc9e4 100644
--- a/src/southbridge/amd/sb600/sb600.c
+++ b/src/southbridge/amd/sb600/sb600.c
@@ -118,7 +118,7 @@ void sb600_enable(device_t dev)
 
 	u32 devfn;
 
-	printk_debug("sb600_enable()\n");
+	printk(BIOS_DEBUG, "sb600_enable()\n");
 
 /*
 *	0:12.0  SATA	bit 8 of sm_dev 0xac : 1 - enable, default         + 32 * 3
@@ -220,7 +220,7 @@ void sb600_enable(device_t dev)
 		index += 32 * 4;
 		break;
 	default:
-		printk_debug("unknown dev: %s deviceid=%4x\n", dev_path(dev),
+		printk(BIOS_DEBUG, "unknown dev: %s deviceid=%4x\n", dev_path(dev),
 			     deviceid);
 	}
 }
diff --git a/src/southbridge/amd/sb600/sb600_early_setup.c b/src/southbridge/amd/sb600/sb600_early_setup.c
index 29c215adba..b7581ec352 100644
--- a/src/southbridge/amd/sb600/sb600_early_setup.c
+++ b/src/southbridge/amd/sb600/sb600_early_setup.c
@@ -284,16 +284,16 @@ static void sb600_devices_por_init(void)
 	device_t dev;
 	u8 byte;
 
-	printk_info("sb600_devices_por_init()\n");
+	printk(BIOS_INFO, "sb600_devices_por_init()\n");
 	/* SMBus Device, BDF:0-20-0 */
-	printk_info("sb600_devices_por_init(): SMBus Device, BDF:0-20-0\n");
+	printk(BIOS_INFO, "sb600_devices_por_init(): SMBus Device, BDF:0-20-0\n");
 	dev = pci_locate_device(PCI_ID(0x1002, 0x4385), 0);
 
 	if (dev == PCI_DEV_INVALID) {
 		die("SMBUS controller not found\r\n");
 		/* NOT REACHED */
 	}
-	printk_info("SMBus controller enabled, sb revision is 0x%x\r\n",
+	printk(BIOS_INFO, "SMBus controller enabled, sb revision is 0x%x\r\n",
 		    get_sb600_revision());
 
 	/* sbPorAtStartOfTblCfg */
@@ -372,7 +372,7 @@ static void sb600_devices_por_init(void)
 	outb(inb(SMBUS_IO_BASE + SMBHSTSTAT), SMBUS_IO_BASE + SMBHSTSTAT);
 
 	/* IDE Device, BDF:0-20-1 */
-	printk_info("sb600_devices_por_init(): IDE Device, BDF:0-20-1\n");
+	printk(BIOS_INFO, "sb600_devices_por_init(): IDE Device, BDF:0-20-1\n");
 	dev = pci_locate_device(PCI_ID(0x1002, 0x438C), 0);
 	/* Disable prefetch */
 	byte = pci_read_config8(dev, 0x63);
@@ -380,7 +380,7 @@ static void sb600_devices_por_init(void)
 	pci_write_config8(dev, 0x63, byte);
 
 	/* LPC Device, BDF:0-20-3 */
-	printk_info("sb600_devices_por_init(): LPC Device, BDF:0-20-3\n");
+	printk(BIOS_INFO, "sb600_devices_por_init(): LPC Device, BDF:0-20-3\n");
 	dev = pci_locate_device(PCI_ID(0x1002, 0x438D), 0);
 	/* DMA enable */
 	pci_write_config8(dev, 0x40, 0x04);
@@ -417,7 +417,7 @@ static void sb600_devices_por_init(void)
 
 	/* P2P Bridge, BDF:0-20-4, the configuration of the registers in this dev are copied from CIM,
 	 * TODO: I don't know what are their mean? */
-	printk_info("sb600_devices_por_init(): P2P Bridge, BDF:0-20-4\n");
+	printk(BIOS_INFO, "sb600_devices_por_init(): P2P Bridge, BDF:0-20-4\n");
 	dev = pci_locate_device(PCI_ID(0x1002, 0x4384), 0);
 	/* I don't know why CIM tried to write into a read-only reg! */
 	/*pci_write_config8(dev, 0x0c, 0x20) */ ;
@@ -448,7 +448,7 @@ static void sb600_devices_por_init(void)
 	pci_write_config8(dev, 0x50, 0x01);
 
 	/* SATA Device, BDF:0-18-0, Non-Raid-5 SATA controller */
-	printk_info("sb600_devices_por_init(): SATA Device, BDF:0-18-0\n");
+	printk(BIOS_INFO, "sb600_devices_por_init(): SATA Device, BDF:0-18-0\n");
 	dev = pci_locate_device(PCI_ID(0x1002, 0x4380), 0);
 
 	/*PHY Global Control, we are using A14.
@@ -479,7 +479,7 @@ static void sb600_pmio_por_init(void)
 {
 	u8 byte;
 
-	printk_info("sb600_pmio_por_init()\n");
+	printk(BIOS_INFO, "sb600_pmio_por_init()\n");
 	/* K8KbRstEn, KB_RST# control for K8 system. */
 	byte = pmio_read(0x66);
 	byte |= 0x20;
@@ -676,7 +676,7 @@ static void sb600_before_pci_init(void)
 */
 static void sb600_early_setup(void)
 {
-	printk_info("sb600_early_setup()\n");
+	printk(BIOS_INFO, "sb600_early_setup()\n");
 	sb600_por_init();
 }
 
diff --git a/src/southbridge/amd/sb600/sb600_hda.c b/src/southbridge/amd/sb600/sb600_hda.c
index 95e3744db5..3ba1fe910e 100644
--- a/src/southbridge/amd/sb600/sb600_hda.c
+++ b/src/southbridge/amd/sb600/sb600_hda.c
@@ -86,7 +86,7 @@ no_codec:
 	/* Codec Not found */
 	/* Put HDA back in reset (BAR + 0x8) [0] */
 	set_bits(base + 0x08, 1, 0);
-	printk_debug("No codec!\n");
+	printk(BIOS_DEBUG, "No codec!\n");
 	return 0;
 }
 
@@ -156,9 +156,9 @@ static u32 find_verb(u32 viddid, u32 ** verb)
 	device_t azalia_dev = dev_find_slot(0, PCI_DEVFN(0x14, 2));
 	struct southbridge_amd_sb600_config *cfg =
 	    (struct southbridge_amd_sb600_config *)azalia_dev->chip_info;
-	printk_debug("Dev=%s\n", dev_path(azalia_dev));
-	printk_debug("Default viddid=%x\n", cfg->hda_viddid);
-	printk_debug("Reading viddid=%x\n", viddid);
+	printk(BIOS_DEBUG, "Dev=%s\n", dev_path(azalia_dev));
+	printk(BIOS_DEBUG, "Default viddid=%x\n", cfg->hda_viddid);
+	printk(BIOS_DEBUG, "Reading viddid=%x\n", viddid);
 	if (!cfg)
 		return 0;
 	if (viddid != cfg->hda_viddid)
@@ -232,15 +232,15 @@ static void codec_init(u32 base, int addr)
 	dword = read32(base + 0x64);
 
 	/* 2 */
-	printk_debug("codec viddid: %08x\n", dword);
+	printk(BIOS_DEBUG, "codec viddid: %08x\n", dword);
 	verb_size = find_verb(dword, &verb);
 
 	if (!verb_size) {
-		printk_debug("No verb!\n");
+		printk(BIOS_DEBUG, "No verb!\n");
 		return;
 	}
 
-	printk_debug("verb_size: %d\n", verb_size);
+	printk(BIOS_DEBUG, "verb_size: %d\n", verb_size);
 	/* 3 */
 	for (i = 0; i < verb_size; i++) {
 		if (wait_for_ready(base) == -1)
@@ -251,7 +251,7 @@ static void codec_init(u32 base, int addr)
 		if (wait_for_valid(base) == -1)
 			return;
 	}
-	printk_debug("verb loaded!\n");
+	printk(BIOS_DEBUG, "verb loaded!\n");
 }
 
 static void codecs_init(u32 base, u32 codec_mask)
@@ -302,11 +302,11 @@ static void hda_init(struct device *dev)
 		return;
 
 	base = ((u32)res->base);
-	printk_debug("base = 0x%x\n", base);
+	printk(BIOS_DEBUG, "base = 0x%x\n", base);
 	codec_mask = codec_detect(base);
 
 	if (codec_mask) {
-		printk_debug("codec_mask = %02x\n", codec_mask);
+		printk(BIOS_DEBUG, "codec_mask = %02x\n", codec_mask);
 		codecs_init(base, codec_mask);
 	}
 }
diff --git a/src/southbridge/amd/sb600/sb600_lpc.c b/src/southbridge/amd/sb600/sb600_lpc.c
index a79cef9cf4..1f3253f55b 100644
--- a/src/southbridge/amd/sb600/sb600_lpc.c
+++ b/src/southbridge/amd/sb600/sb600_lpc.c
@@ -130,8 +130,7 @@ static void sb600_lpc_enable_childrens_resources(device_t dev)
 						continue;
 					base = res->base;
 					end = resource_end(res);
-					printk_debug
-					    ("sb600 lpc decode:%s, base=0x%08x, end=0x%08x\n",
+					printk(BIOS_DEBUG, "sb600 lpc decode:%s, base=0x%08x, end=0x%08x\n",
 					     dev_path(child), base, end);
 					switch (base) {
 					case 0x60:	/*  KB */
diff --git a/src/southbridge/amd/sb600/sb600_sata.c b/src/southbridge/amd/sb600/sb600_sata.c
index 251f5ad2f0..0feebac92f 100644
--- a/src/southbridge/amd/sb600/sb600_sata.c
+++ b/src/southbridge/amd/sb600/sb600_sata.c
@@ -35,22 +35,22 @@ static int sata_drive_detect(int portnum, u16 iobar)
 	while (byte = inb(iobar + 0x6), byte2 = inb(iobar + 0x7),
 		(byte != (0xA0 + 0x10 * (portnum % 2))) ||
 		((byte2 & 0x88) != 0)) {
-		printk_spew("0x6=%x, 0x7=%x\n", byte, byte2);
+		printk(BIOS_SPEW, "0x6=%x, 0x7=%x\n", byte, byte2);
 		if (byte != (0xA0 + 0x10 * (portnum % 2))) {
 			/* This will happen at the first iteration of this loop
 			 * if the first SATA port is unpopulated and the
 			 * second SATA port is poulated.
 			 */
-			printk_debug("drive no longer selected after %i ms, "
+			printk(BIOS_DEBUG, "drive no longer selected after %i ms, "
 				"retrying init\n", i * 10);
 			return 1;
 		} else
-			printk_spew("drive detection not yet completed, "
+			printk(BIOS_SPEW, "drive detection not yet completed, "
 				"waiting...\n");
 		mdelay(10);
 		i++;
 	}
-	printk_spew("drive detection done after %i ms\n", i * 10);
+	printk(BIOS_SPEW, "drive detection done after %i ms\n", i * 10);
 	return 0;
 }
 
@@ -91,12 +91,12 @@ static void sata_init(struct device *dev)
 	sata_bar3 = pci_read_config16(dev, 0x1C) & ~0x3;
 	sata_bar4 = pci_read_config16(dev, 0x20) & ~0xf;
 
-	printk_spew("sata_bar0=%x\n", sata_bar0);	/* 3030 */
-	printk_spew("sata_bar1=%x\n", sata_bar1);	/* 3070 */
-	printk_spew("sata_bar2=%x\n", sata_bar2);	/* 3040 */
-	printk_spew("sata_bar3=%x\n", sata_bar3);	/* 3080 */
-	printk_spew("sata_bar4=%x\n", sata_bar4);	/* 3000 */
-	printk_spew("sata_bar5=%x\n", sata_bar5);	/* e0309000 */
+	printk(BIOS_SPEW, "sata_bar0=%x\n", sata_bar0);	/* 3030 */
+	printk(BIOS_SPEW, "sata_bar1=%x\n", sata_bar1);	/* 3070 */
+	printk(BIOS_SPEW, "sata_bar2=%x\n", sata_bar2);	/* 3040 */
+	printk(BIOS_SPEW, "sata_bar3=%x\n", sata_bar3);	/* 3080 */
+	printk(BIOS_SPEW, "sata_bar4=%x\n", sata_bar4);	/* 3000 */
+	printk(BIOS_SPEW, "sata_bar5=%x\n", sata_bar5);	/* e0309000 */
 
 	/* Program the 2C to 0x43801002 */
 	dword = 0x43801002;
@@ -173,13 +173,13 @@ static void sata_init(struct device *dev)
 
 	for (i = 0; i < 4; i++) {
 		byte = read8(sata_bar5 + 0x128 + 0x80 * i);
-		printk_spew("SATA port %i status = %x\n", i, byte);
+		printk(BIOS_SPEW, "SATA port %i status = %x\n", i, byte);
 		byte &= 0xF;
 
 		if( byte == 0x1 ) {
 			/* If the drive status is 0x1 then we see it but we aren't talking to it. */
 			/* Try to do something about it. */
-			printk_spew("SATA device detected but not talking. Trying lower speed.\n");
+			printk(BIOS_SPEW, "SATA device detected but not talking. Trying lower speed.\n");
 
 			/* Read in Port-N Serial ATA Control Register */
 			byte = read8(sata_bar5 + 0x12C + 0x80 * i);
@@ -200,7 +200,7 @@ static void sata_init(struct device *dev)
 
 			/* Reread status */
 			byte = read8(sata_bar5 + 0x128 + 0x80 * i);
-			printk_spew("SATA port %i status = %x\n", i, byte);
+			printk(BIOS_SPEW, "SATA port %i status = %x\n", i, byte);
 			byte &= 0xF;
 		}
 
@@ -209,13 +209,13 @@ static void sata_init(struct device *dev)
 				if (!sata_drive_detect(i, ((i / 2) == 0) ? sata_bar0 : sata_bar2))
 					break;
 			}
-			printk_debug("%s %s device is %sready after %i tries\n",
+			printk(BIOS_DEBUG, "%s %s device is %sready after %i tries\n",
 					(i / 2) ? "Secondary" : "Primary",
 					(i % 2 ) ? "Slave" : "Master",
 					(j == 10) ? "not " : "",
 					(j == 10) ? j : j + 1);
 		} else {
-			printk_debug("No %s %s SATA drive on Slot%i\n",
+			printk(BIOS_DEBUG, "No %s %s SATA drive on Slot%i\n",
 					(i / 2) ? "Secondary" : "Primary",
 					(i % 2 ) ? "Slave" : "Master", i);
 		}
@@ -240,7 +240,7 @@ static void sata_init(struct device *dev)
 	/* word = pm_ioread(0x28); */
 	/* byte = pm_ioread(0x29); */
 	/* word |= byte<<8; */
-	/* printk_debug("AcpiGpe0Blk addr = %x\n", word); */
+	/* printk(BIOS_DEBUG, "AcpiGpe0Blk addr = %x\n", word); */
 	/* write32(word, 0x80000000); */
 }
 
diff --git a/src/southbridge/amd/sb600/sb600_sm.c b/src/southbridge/amd/sb600/sb600_sm.c
index 8e275291ba..6a18bfeea5 100644
--- a/src/southbridge/amd/sb600/sb600_sm.c
+++ b/src/southbridge/amd/sb600/sb600_sm.c
@@ -54,7 +54,7 @@ static void sm_init(device_t dev)
 	u32 on;
 	u32 nmi_option;
 
-	printk_info("sm_init().\n");
+	printk(BIOS_INFO, "sm_init().\n");
 
 	ioapic_base = pci_read_config32(dev, 0x74) & (0xffffffe0);	/* some like mem resource, but does not have  enable bit */
 	/* Don't rename APIC ID */
@@ -98,7 +98,7 @@ static void sm_init(device_t dev)
 	}
 	byte |= 1 << 2;
 	pm_iowrite(0x74, byte);
-	printk_info("set power %s after power fail\n", on ? "on" : "off");
+	printk(BIOS_INFO, "set power %s after power fail\n", on ? "on" : "off");
 
 	/* sb600 rpr:2.3.3: */
 	byte = pm_ioread(0x9A);
@@ -154,10 +154,10 @@ static void sm_init(device_t dev)
 	get_option(&nmi_option, "nmi");
 	if (nmi_option) {
 		byte &= ~(1 << 7);	/* set NMI */
-		printk_info("++++++++++set NMI+++++\n");
+		printk(BIOS_INFO, "++++++++++set NMI+++++\n");
 	} else {
 		byte |= (1 << 7);	/* Can not mask NMI from PCI-E and NMI_NOW */
-		printk_info("++++++++++no set NMI+++++\n");
+		printk(BIOS_INFO, "++++++++++no set NMI+++++\n");
 	}
 	byte &= ~(1 << 7);
 	if (byte != byte_old) {
@@ -197,9 +197,9 @@ static void sm_init(device_t dev)
 	/* 3.12: Enabling AB and BIF Clock Gating */
 	abcfg_reg(0x10054, 0xFFFF0000, 0x1040000);
 	abcfg_reg(0x54, 0xFF << 16, 4 << 16);
-	printk_info("3.11, ABCFG:0x54\n");
+	printk(BIOS_INFO, "3.11, ABCFG:0x54\n");
 	abcfg_reg(0x54, 1 << 24, 1 << 24);
-	printk_info("3.12, ABCFG:0x54\n");
+	printk(BIOS_INFO, "3.12, ABCFG:0x54\n");
 	abcfg_reg(0x98, 0x0000FF00, 0x00004700);
 
 	/* 3.13:Enabling AB Int_Arbiter Enhancement (for All Revisions) */
@@ -211,7 +211,7 @@ static void sm_init(device_t dev)
 
 	abcfg_reg(0x10098, 0xFFFFFFFF, 0x4000);
 	abcfg_reg(0x04, 0xFFFFFFFF, 0x6);
-	printk_info("sm_init() end\n");
+	printk(BIOS_INFO, "sm_init() end\n");
 
 	/* Enable NbSb virtual channel */
 	axcfg_reg(0x114, 0x3f << 1, 0 << 1);
diff --git a/src/southbridge/amd/sb600/sb600_smbus.c b/src/southbridge/amd/sb600/sb600_smbus.c
index df7ec56c3e..9e14930b09 100644
--- a/src/southbridge/amd/sb600/sb600_smbus.c
+++ b/src/southbridge/amd/sb600/sb600_smbus.c
@@ -188,7 +188,7 @@ static void alink_ab_indx(u32 reg_space, u32 reg_addr,
 	tmp &= ~mask;
 	tmp |= val;
 
-	/* printk_debug("about write %x, index=%x", tmp, (reg_space&0x3)<<30 | reg_addr); */
+	/* printk(BIOS_DEBUG, "about write %x, index=%x", tmp, (reg_space&0x3)<<30 | reg_addr); */
 	outl((reg_space & 0x3) << 30 | reg_addr, AB_INDX);	/* probably we dont have to do it again. */
 	outl(tmp, AB_DATA);
 }
diff --git a/src/southbridge/amd/sb600/sb600_usb.c b/src/southbridge/amd/sb600/sb600_usb.c
index 134e12560e..b6e1fbec6b 100644
--- a/src/southbridge/amd/sb600/sb600_usb.c
+++ b/src/southbridge/amd/sb600/sb600_usb.c
@@ -94,7 +94,7 @@ static void usb_init2(struct device *dev)
 	/* pci_write_config32(dev, 0xf8, dword); */
 
 	usb2_bar0 = pci_read_config32(dev, 0x10) & ~0xFF;
-	printk_info("usb2_bar0=0x%x\n", usb2_bar0);
+	printk(BIOS_INFO, "usb2_bar0=0x%x\n", usb2_bar0);
 
 	/* RPR5.4 Enables the USB PHY auto calibration resister to match 45ohm resistence */
 	dword = 0x00020F00;