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| author | Stefan Reinauer <reinauer@chromium.org> | 2011-10-31 12:56:45 -0700 |
|---|---|---|
| committer | Patrick Georgi <patrick@georgi-clan.de> | 2011-11-01 19:07:45 +0100 |
| commit | 5ff7c13e858a31addf1558731a12cf6c753b576d (patch) | |
| tree | 82ed6cf7b45f3a86c2c43ab87383355ed6012d6c /src/southbridge/amd/sb600 | |
| parent | 784544b934d67dc85ccfcf33e04ff148045836ad (diff) | |
| download | coreboot-5ff7c13e858a31addf1558731a12cf6c753b576d.tar.xz | |
remove trailing whitespace
Change-Id: Ib91889a374515d36a2b12b53aeb12b6ea6e22732
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/364
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/southbridge/amd/sb600')
| -rw-r--r-- | src/southbridge/amd/sb600/sata.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/amd/sb600/sata.c b/src/southbridge/amd/sb600/sata.c index 7eda2e854c..121e3d7cbf 100644 --- a/src/southbridge/amd/sb600/sata.c +++ b/src/southbridge/amd/sb600/sata.c @@ -123,8 +123,8 @@ static void sata_init(struct device *dev) // no cmos option i = CONFIG_SATA_MODE; } - printk(BIOS_INFO, "%s: setting sata mode = %s\n", __func__, (i == SATA_MODE_IDE)?"ide":"ahci" ); - + printk(BIOS_INFO, "%s: setting sata mode = %s\n", __func__, (i == SATA_MODE_IDE)?"ide":"ahci" ); + dword = pci_read_config32(dev, 0x8); dword &= 0xff0000ff; if (i == SATA_MODE_IDE) |